NXP Semiconductors PXN2020, Reference Manual, Page: 1126 / 1376

Analog-to-Digital Converter (ADC)
PXN20 Microcontroller Reference Manual, Rev. 1
34-46 Freescale Semiconductor
channel to be converted, that is taken as the injected channel value and the triggered injected conversion
starts. The CTUSTART bit is set automatically at this point and it is also automatically reset when the CTU
is disabled (CTUEN = 0).
The CTU and the ADC digital interface are synchronous with the ipg_clk in both cases.
34.4.3.1 CTU Trigger Mode
In CTU trigger mode, normal and injected conversion are still enabled.
When a ctu_trigger pulse is received the output data ctu_numchannel is taken as the injected channel value
and the triggered injected conversion starts. The MSR[CTUSTART] bit is set automatically at this point
and it is also automatically reset when the triggered injected conversion is completed.
CTU conversions must be requested (generating ctu_trigger pulse) when offset cancellation phase is over.
Otherwise, ctu_trigger pulse is discarded. If a ctu_trigger pulse is received during an offset refresh, the
current refresh is immediately stopped in order to satisfy the CTU request.
If an injected conversion (programmed by the user by setting the JSTART bit) is ongoing and a pulse is
received on the ctu_trigger input line, then the injected channel conversion chain is aborted) and only the
triggered injected conversion proceeds. After aborting the injected conversion, the MSR[JSTART] bit is
reset to ‘0’. That abort is signalled through the MSR[JABORT] status bit.
If normal conversion is ongoing and a pulse is received on the ctu_trigger input line, then ongoing channel
conversion is aborted and the triggered injected conversion is processed. When it is finished, normal
conversion resumes from the channel at which the normal conversion was aborted.
If another ctu_trigger pulse is received before ctu_nextcmd signal, that triggered conversion request is
discarded.
When a normal conversion is requested during CTU conversion (CTUSTART = 1), the normal conversion
starts when CTU conversion is completed (CTUSTART = 0). Otherwise when an injected conversion is
requested during CTU conversion, that conversion is discarded and the MCR[JSTART] bit is immediately
reset.
34.4.3.2 CTU Control Mode
When CTU Control mode is enabled, the CPU is able to write in the ADC registers but it cannot start any
conversion. Conversion requests can be generated only by the CTU trigger pulse. If a normal or injected
conversion is requested, it is automatically discarded.
When a ctu_trigger pulse is received the output data ctu_numchannel is taken as the injected channel value
and the triggered injected conversion starts. The CTUSTART bit is set automatically at this point and it is
also automatically reset when CTU Control mode is disabled (CTUEN = 0).
CTU conversions must be requested (generating ctu_trigger pulse) when offset cancellation phase is over.
In fact, each ctu_trigger pulse received during offset cancellation is discarded. Otherwise, if a ctu_trigger
pulse is received during an offset refresh, the current refresh is immediately stopped in order to satisfy the
CTU request.
Timings of CTU interface signals in CTU Control mode are shown in Figure 34-43 and Figure 34-44 .