NXP Semiconductors PXN2020, Reference Manual, Page: 1032 / 1376

Enhanced Serial Communication Interface (eSCI)
PXN20 Microcontroller Reference Manual, Rev. 1
31-42 Freescale Semiconductor
Figure 31-36. Idle-Line Wakeup Format
31.4.5.5.2 Address-Mark Wakeup
The address-mark wakeup mode is selected when the WAKE bit in eSCI Control Register 1 (eSCI_CR1)
is 1. If the WAKE bit is set, the address bit is added to the frame format. In this mode, the receiver leaves
the wakeup state, when a data frame with the address bit value of 1 was received. This frame is the address
frame and contains address information that can be evaluated by the application. If the application decides
not to receive the frame block, it can set the RWU bit in the eSCI Control Register 1 (eSCI_CR1) and
return the receiver to the wakeup state. All data frames that belong to the frame block must have the
address bit cleared.
Figure 31-37. Address-Mark Wakeup Format
31.4.6 LIN Mode
The eSCI provides support for the LIN protocol. It can be used to automate most tasks of a LIN master. In
conjunction with the DMA interface it is possible to transmit entire LIN frames and sequences of LIN
frames as well as to receive data from LIN slaves without application intervention. There is no special
support for LIN slave mode.
31.4.6.1 LIN Mode Configuration
The application must configure the following bits and fields in order to achieve correct LIN operation. The
configuration of bits and fields not mentioned in this section depend on the connected LIN slaves and the
current application.
• enable LIN Mode
– eSCI LIN Control Register 1 (eSCI_LCR1)[LIN]:= 1
• select RXD pin as receiver input
– eSCI Control Register 1 (eSCI_CR1)[LOOPS]:= 0
– eSCI Control Register 1 (eSCI_CR1)[RSRC]:= 0
• select LIN byte fields as used frame format
Frame Block Frame Block Idle Character
Receiver Wakeup
Address Frame
Frame Block Frame Block
Receiver Wakeup
Address Frame
(ADDR BIT = 1)
Address Frame
(ADDR BIT = 1)
Receiver Wakeup
ignored idle times