NXP Semiconductors
UM191812
PN544 C2 User Manual
191812
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User Manual
Rev. 1.2 — 2010-06-16
99 of 172
9.8 MIFARE PCD
PN544 offers MIFARE PCD functionality through the generic “Type A reader RF gate” of
the ETSI HCI specification [1]. Activation is as defined in the specification, and then the
MIFARE card
(MIFARE UltraLight
&
MIFARE 1K/4K
) can be accessed with the
following NXP proprietary command of the “Type A RF reader gate”
9.8.1 NXP_MIFARE_RAW
NOTE: This command is only valid for
MIFARE UltraLight
access.
Table 77.
NXP_MIFARE_RAW Command
Value Command
Description
’20’
NXP_MIFARE_RAW
This command allows the exchange of raw data between
the host and a MIFARE ® card previously activated. Within
this command and response, the CRC has to be handled
by the host.
This command has the following parameters:
Table 78.
NXP_MIFARE_RAW Parameters
Description Length
TO 1
Status 1
Data N
•
TO
value specify the timeout to be used with the following formula:
•
Timeout = (256 × 16 / 13.56MHz) × 2 ^ TO (TO = 0 to 14)
•
Status
: bits b0 to b2 indicate information on valid bits in the last data byte (value 0
indicates all are valid, from 1 to 7 it indicated the number of valid bits), other bits are
RFU. Only value 0 is handled as no MIFARE command requires not byte align data.
•
Data
is the raw frame to be sent to the card (including CRC)
Please Note that Mifare documentation uses MSByte first whereas
PN544 uses LSByte first convention