NXP Semiconductors
AN11740
PN5180 Antenna design
AN11740
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Application note
COMPANY PUBLIC
Rev. 1.1 — 19 June 2018
345311
46 of 62
(1) TX_SET_TAU_MOD_FALLING & TX_SET_TAU_MOD_RISING
(2) TX_SET_SLEW_SHUNTREG
Fig 42. Tx envelope shaping
For a standard asymmetrical antenna design typically, the fastest rise and fall times for
the envelope is required:
The fastest rise and fall times (only defined by the system-Q factor) – exemplarily shown
in Fig 41 (right hand side) - can be achieved by means of using:
•
Disabled TX undershoot protection (TX_UNDERSHOOT_PROT_ENABLE = 0)
•
Disabled TX overshoot protection (TX_OVERSHOOT_PROT_ENABLE = 0)
•
Disabled TX Shaping (TX_BYPASS_SC_SHAPING = 1)
•
TX_CLK_MODE_RM = 0x1 (default) or 0x5 (low side pull)
More details refer to [14] and [15].
4.5 Optimizing the receiving
The Fig 43 shows the high-level principle of the Rx blocks for one Rx path. The major
register for the Rx are
Receiver gain (Rx_Gain),
High Pass Corner Frequency (Rx_HPCF), and
Receiver thresholds (MIN_LEVEL and MIN_LEVEL_P).
The AGC is set to be used in automatic mode. The current AGC_VALUE (which adjusts
the “internal resistor”) can be read from the RF_STATUS register.
The RX_GAIN adjusts the analog gain of the demodulated subcarrier in the I and Q
channel. The RX_HPCF limits the bandwidth of the (modulated) sub carrier signal.
For the optimization of the Rx circuit it is recommended to use the debug and test signals
as described below and in [1].
