![NXP Semiconductors MWCT101 S Series Reference Manual Download Page 197](http://html1.mh-extra.com/html/nxp-semiconductors/mwct101-s-series/mwct101-s-series_reference-manual_1722210197.webp)
12.3.1 General operation
When a master accesses the crossbar switch, the access is immediately taken. If the
targeted slave port of the access is available, then the access is immediately presented on
the slave port. Single-clock or zero-wait-state accesses are possible through the crossbar.
If the targeted slave port of the access is busy or parked on a different master port, the
requesting master simply sees wait states inserted until the targeted slave port can service
the master's request. The latency in servicing the request depends on each master's
priority level and the responding slave's access time.
Because the crossbar switch appears to be just another slave to the master device, the
master device has no knowledge of whether it actually owns the slave port it is targeting.
While the master does not have control of the slave port it is targeting, it simply waits.
After the master has control of the slave port it is targeting, the master remains in control
of the slave port until it relinquishes the slave port by running an IDLE cycle or by
targeting a different slave port for its next access.
The master can also lose control of the slave port if another higher-priority master makes
a request to the slave port.
The crossbar terminates all master IDLE transfers, as opposed to allowing the termination
to come from one of the slave buses. Additionally, when no master is requesting access to
a slave port, the crossbar drives IDLE transfers onto the slave bus, even though a default
master may be granted access to the slave port.
When a slave bus is being idled by the crossbar, it remains parked with the last master to
use the slave port. This is done to save the initial clock of arbitration delay that otherwise
would be seen if the same master had to arbitrate to gain control of the slave port.
12.3.2 Arbitration
The crossbar switch supports two arbitration algorithms:
• Fixed priority
• Round-robin
The selection of the global slave port arbitration algorithm is described in the crossbar
switch chip-specific information.
12.3.2.1 Arbitration during undefined length bursts
Undefined length bursts can be interrupted.
Chapter 12 Crossbar Switch Lite (AXBS-Lite)
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
NXP Semiconductors
197
Summary of Contents for MWCT101 S Series
Page 2: ...MWCT101xS Series Reference Manual Rev 3 07 2019 2 NXP Semiconductors...
Page 42: ...MWCT101xS Series Reference Manual Rev 3 07 2019 42 NXP Semiconductors...
Page 50: ...Conventions MWCT101xS Series Reference Manual Rev 3 07 2019 50 NXP Semiconductors...
Page 70: ...Aliased bit band regions MWCT101xS Series Reference Manual Rev 3 07 2019 70 NXP Semiconductors...
Page 78: ...Pinout diagrams MWCT101xS Series Reference Manual Rev 3 07 2019 78 NXP Semiconductors...
Page 96: ...WCT101xS safety concept MWCT101xS Series Reference Manual Rev 3 07 2019 96 NXP Semiconductors...
Page 130: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 130 NXP Semiconductors...
Page 284: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 284 NXP Semiconductors...
Page 430: ...Functional Description MWCT101xS Series Reference Manual Rev 3 07 2019 430 NXP Semiconductors...
Page 472: ...Application Information MWCT101xS Series Reference Manual Rev 3 07 2019 472 NXP Semiconductors...
Page 528: ...Module clocks MWCT101xS Series Reference Manual Rev 3 07 2019 528 NXP Semiconductors...
Page 634: ...SRAM configuration MWCT101xS Series Reference Manual Rev 3 07 2019 634 NXP Semiconductors...
Page 818: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 818 NXP Semiconductors...
Page 960: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 960 NXP Semiconductors...
Page 992: ...ADC calibration scheme MWCT101xS Series Reference Manual Rev 3 07 2019 992 NXP Semiconductors...
Page 1348: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 1348 NXP Semiconductors...
Page 1366: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 1366 NXP Semiconductors...
Page 1514: ...Functional description MWCT101xS Series Reference Manual Rev 3 07 2019 1514 NXP Semiconductors...
Page 1726: ...Debug and security MWCT101xS Series Reference Manual Rev 3 07 2019 1726 NXP Semiconductors...
Page 1760: ...MWCT101xS Series Reference Manual Rev 3 07 2019 1760 NXP Semiconductors...