NXP Semiconductors MWCT101 S Series, Reference Manual

Page: 1341 / 1761

Field Function
0111b - Prescaler divides the prescaler clock by 256; glitch filter recognizes change on input pin
after 128 rising clock edges.
1000b - Prescaler divides the prescaler clock by 512; glitch filter recognizes change on input pin
after 256 rising clock edges.
1001b - Prescaler divides the prescaler clock by 1024; glitch filter recognizes change on input pin
after 512 rising clock edges.
1010b - Prescaler divides the prescaler clock by 2048; glitch filter recognizes change on input pin
after 1024 rising clock edges.
1011b - Prescaler divides the prescaler clock by 4096; glitch filter recognizes change on input pin
after 2048 rising clock edges.
1100b - Prescaler divides the prescaler clock by 8192; glitch filter recognizes change on input pin
after 4096 rising clock edges.
1101b - Prescaler divides the prescaler clock by 16,384; glitch filter recognizes change on input pin
after 8192 rising clock edges.
1110b - Prescaler divides the prescaler clock by 32,768; glitch filter recognizes change on input pin
after 16,384 rising clock edges.
1111b - Prescaler divides the prescaler clock by 65,536; glitch filter recognizes change on input pin
after 32,768 rising clock edges.
2
PBYP
Prescaler Bypass
When PBYP is set, the selected prescaler clock in Time Counter mode or selected input source in Pulse
Counter mode directly clocks the CNR. When PBYP is clear, the CNR is clocked by the output of the
prescaler/glitch filter. PBYP must be altered only when the LPTMR is disabled.
0b - Prescaler/glitch filter is enabled.
1b - Prescaler/glitch filter is bypassed.
1-0
PCS
Prescaler Clock Select
Selects the clock to be used by the LPTMR prescaler/glitch filter. In time counter mode, this field selects
the input clock to the prescaler. In pulse counter mode, this field selects the input clock to the glitch filter.
PCS must be altered only when the LPTMR is disabled. The clock connections vary by device.
NOTE: See the chip configuration details for information on the connections to these inputs.
00b - Prescaler/glitch filter clock 0 selected.
01b - Prescaler/glitch filter clock 1 selected.
10b - Prescaler/glitch filter clock 2 selected.
11b - Prescaler/glitch filter clock 3 selected.
43.4.1.4 Low Power Timer Compare Register (CMR)
43.4.1.4.1 Offset
Register Offset
CMR 8h
Chapter 43 Low Power Timer (LPTMR)
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
NXP Semiconductors 1341