NXP Semiconductors MWCT101 S Series, Reference Manual, Page: 1277 / 1761

The GTB feature only allows the FTM counters to start
their operation synchronously.
41.5.31.1 Enabling the global time base (GTB)
To enable the GTB feature, follow these steps for each participating FTM module:
1. Stop the FTM counter: Write 00b to SC[CLKS].
2. Program the FTM to the intended configuration. The FTM counter mode needs to be
consistent across all participating modules.
3. Write 1 to CONF[GTBEEN] and write 0 to CONF[GTBEOUT] at the same time.
4. Select the intended FTM counter clock source in SC[CLKS]. The clock source needs
to be consistent across all participating modules.
5. Reset the FTM counter: Write any value to the CNT register.
To initiate the GTB feature in the configuration described in the preceding figure, write 1
to CONF[GTBEOUT] in the FTM module used as the time base.
41.5.32 Channel trigger output
The channel trigger output provides a trigger signal which has one FTM input clock
period width in the channel (n) output.
If the TRIGMODE bit of the CnSC register is set (TRIGMODE = 1), a trigger pulse with
one FTM input clock width is generated in the channel (n) output when a match occurs. It
is only allowed to use trigger mode when channel (n) is in EPWM or CPWM modes.
The figures below show some cases of channel (n) trigger generation in the channel (n)
output.
0x05 0x00 0x01 0x02 0x03 0x04 0x05 0x00 0x01 0x02 0x03 0x04
FTM input clock
FTM counter
Channel (n) output
MOD = 0x0005
CnV = 0x0003
PS[2:0] = 001
TRIGMODE = 1
Figure 41-114. Example of channel (n) trigger at the channel (n) output in EPWM mode
Chapter 41 FlexTimer Module (FTM)
MWCT101xS Series Reference Manual, Rev. 3, 07/2019
NXP Semiconductors 1277