
Enhanced Time Processing Unit (eTPU2)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
933
24.5.9.1.7
Semaphore operations
Semaphore lock and free operations are available through eTPU microcode. For more information about
semaphores see
Section 24.5.4.4, Hardware Semaphores
. Two microinstruction fields control semaphore
operations: FL (1 bit) and SMPR (2 bits). Serviced channel sees four semaphores, selected by field SMPR.
When freeing a semaphore, the field SMPR has no meaning. This is because only one semaphore can be
locked at a time by each engine, so when freeing a semaphore it is not necessary to specify its number.
NOTE
If microcode tries to lock a semaphore already locked for the same engine,
the semaphore continues locked for the engine and the SMLCK branch
condition resolves as true.
24.5.9.2
ALU/MDU operations
ALU/MDU microoperations mostly comprises two sources, one destination and one operation. The
operation is generally selected through fields ALUOP, ALUOPI or SHF. In formats where there is no
operation selection field (ALUOP, ALUOPI or SHF), the operation performed is always addition;
however, it is possible to perform subtraction, increment or decrement using fields BINV (see
Section 24.5.9.2.4, B-Source inversion
) and CIN (see
Section 24.5.9.2.5, Carry-in Control
24.5.9.2.1
Source and destination register set selection
Microcode field T4ABS allows selection of a source from either one of two register sets, shown in
. The same applies to T2ABD, used for ALU destination selection with other two register sets,
. Microinstruction fields ABSE and ABDE control the register set selection for
source and destination, respectively, when available at the format. In formats without ABSE/ABDE, the
field T4BBS determines the register sets used by T2ABD and T4ABS, as shown in
Microinstructions Without Fields ABSE and ABDE
Table 24-76. DIOB Post-Increment / Pre-Decrement – STC
STC
Meaning
00
Post-Increment of DIOB
01
Pre-Decrement of DIOB
10
No Increment/Decrement (normal access)
11
No SPRAM Access
1
1
Also disables Zero SPRAM operation
Table 24-77. Semaphore operations fields
Field
Meaning
FL
0 = free semaphore,
1 = lock semaphore
SMPR
semaphore number selector
Summary of Contents for MPC5644A
Page 2: ...MPC5644A Microcontroller Reference Manual Rev 6 2 Freescale Semiconductor...
Page 24: ...MPC5644A Microcontroller Reference Manual Rev 6 24 Freescale Semiconductor...
Page 26: ...MPC5644A Microcontroller Reference Manual Rev 6 26 Freescale Semiconductor...
Page 52: ...Introduction MPC5644A Microcontroller Reference Manual Rev 6 52 Freescale Semiconductor...
Page 56: ...Memory Map MPC5644A Microcontroller Reference Manual Rev 6 56 Freescale Semiconductor...
Page 1228: ...Decimation Filter MPC5644A Microcontroller Reference Manual Rev 6 1228 Freescale Semiconductor...
Page 1440: ...FlexCAN Module MPC5644A Microcontroller Reference Manual Rev 6 1440 Freescale Semiconductor...