NXP Semiconductors MPC5644A, Reference Manual, Page: 916 / 1735

Enhanced Time Processing Unit (eTPU2)
MPC5644A Microcontroller Reference Manual, Rev. 6
916 Freescale Semiconductor
24.5.8.1.3 ERTA and ERTB Registers
ERTA/B registers are 24-bit wide and can be used as source or destination in arithmetic/logical operations.
ERTA/B are the only source for channel’s match registers write (see
Section 24.5.9.3.5, Write Channel
Match and UDCM Registers ). ERTA can also be the source for UDCM write.
When a thread starts to be executed, ERTA and ERTB are loaded with a copy of CaptureA and CaptureB
registers respectively. ERTA/B can be used to receive a copy of MatchA and MatchB registers. ERTA/B
are the only destination of MatchA/B read operation (see
Section , Special T4ABS source operation: Read
match registers ).
ERTA and ERTB also receive a copy of CaptureA and CaptureB registers when CHAN register is written
(see
Section 24.5.8.1.8, CHAN Register ). For more information about Capture and Match registers see
Section , MatchA and MatchB Registers , and Section , CaptureA and CaptureB Registers .
24.5.8.1.4 SR – Shift Register
The SR is a 24-bit wide register that can be used as source and destination register for arithmetic/logical
operations. The SR can shift right its contents by 1 bit at time and, at the same time, receive in its bit 23
the lost bit of a shift-right operation in post-ALU shifter (
Section 24.5.8.2, ALU and Post-ALU Shifter ),
allowing the SR to be used to perform 48-bit shift right (see Section 24.5.9.2.6, Shift operations ).
24.5.8.1.5 MACH and MACL Registers
Both MACH and MACL are 24-bit registers, part of MAC/Divide unit (see Section 24.5.8.3, MAC and
Divide Unit (MDU) ). They can be used as source and destination in most arithmetic/logic operations.
When multiply or divide operations are used (multiply-accumulate included), MACH and MACL have
special purpose and some restrictions apply, see
Section 24.5.8.3, MAC and Divide Unit (MDU) , for more
information.
24.5.8.1.6 LINK Register
Link Register is an 8-bit wide register and can be used only as destination in arithmetic operations. LINK
is a write-only command register, which precludes its use as a source register for ALU operations. When
LINK register is written, it issues a service request for the channel number and eTPU engine equal to the
number written in LINK register (see
Section 24.5.1, Functions and threads , and Section 24.5.5.5, Channel
Link , for information about Link Service Request).
24.5.8.1.7 RAR – Report Address Register
The RAR is a 14-bit register and can be used as source and destination in arithmetic operations. The RAR
also receives the contents of PC register when a subroutine call is executed. The contents of the RAR are
loaded into PC when a return from subroutine is executed. The RAR is loaded with value 0x3FFF during
TST. For more information about subroutine call and return see
Section 24.5.9.4.2, Branch operations , and
Section 24.5.9.4.4, Return from subroutine , respectively.