NXP Semiconductors MPC5644A, Reference Manual, Page: 842 / 1735

Enhanced Time Processing Unit (eTPU2)
MPC5644A Microcontroller Reference Manual, Rev. 6
842 Freescale Semiconductor
is able to block or enable the next one. There is a full set of Channel Modes described in Section 24.5.5.4,
Channel Modes , exploring all the capabilities mentioned here.
Each channel has its own set of registers and flags. They are selected, and made accessible to the
Microengine, according to the value written into the microengine
CHAN Register that points to the
desired channel. Every time the CHAN register is written, even if with the same previous value, a channel
is selected and its flags and registers are updated. For further detail, see
Section , Channel Selection
Register – CHAN .
Figure 24-35. Greater-Equal Comparator
Beyond the request of services due to the signal and timing internal to each channel, one eTPU channel
microcode can explicitly request service from another channel through the microengine
LINK Register .
A microcode write to the LINK Register asserts a service request to the channel whose number matches
the contents of LINK. Refer to
Section 24.5.5.5, Channel Link for a complete description of this
mechanism.
These service requests originated in the eTPU Enhanced Channels (either time base match, input signal
transition, or link service request) result in a call to the corresponding channel service routine, which is the
sequence of microinstructions that is called a
Thread . For further detail, refer to Section 24.5.1, Functions
and threads .
In addition to Event Logic, each Channel has an Output Buffer Enable signal, controlled by microcode,
and an Enhanced Digital Filter, which eliminates spurious glitches on input pin signal. Output Buffer
Enable is meant to control output MCU pad signal driver.
A high level diagram of Channel logic and registers is shown in Figure 24-36 .
NOTE: the value opposed to N (N+0x800000) does not cause a match.
Greater-Equal area
0
N
N + 0x800000
TCR1/2