NXP Semiconductors MPC5644A, Reference Manual, Page: 701 / 1735

Reaction Module (REACM)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 701
23.3.5 REACM ADC Sensor Input Register (REACM_SINR)
The REACM ADC Sensor Input Register (REACM_SINR) is used to monitor the ADC Interface (see
Section 23.4.6, ADC interface ) and allows the software to define the ADC result and TAG values for the
Reaction Module. Also, ADC values captured after filtering can be transferred to the Reaction Module by
the CPU. Writes to this register overwrite any value coming from the ADC interface, thus it should be used
when no ADC conversion has the Reaction Module as the target. Writing to this register triggers the
reaction channel selected by the TAG value to execute a comparison and to evaluate an eventually new
value for the channel outputs.
Figure 23-7. REACM ADC Sensor Input Register (REACM_SINR)
Table 23-6. REACM_THRR field descriptions
Field Description
0–5 Reserved, should be cleared.
6
WREN1
Write Enable Bit for THRADC1
The WREN1 write enable bit 1 controls if the ADC result having a TAG matching to THRADC1 field
will be written into address one of the Threshold Bank.
1 Write received ADC result to Threshold bank address one
0 Do not write received ADC result to Threshold bank
7
WREN0
Write Enable Bit for THRADC0
The WREN0 write enable bit 0 controls if the ADC result having a TAG matching to THRADC0 field
will be written into address zero of the Threshold Bank.
1 Write received ADC result to Threshold bank address zero
0 Do not write received ADC result to Threshold bank
8–19 Reserved, should be cleared.
20–23
THRADC1
[3:0]
ADC result Router value for Threshold Bank address one
The THRADC1[3:0] field controls the routing from the received ADC result to the Threshold Bank
address one. Any ADC result which TAG matching THRADC1 will be routed to Threshold Bank.
24–27 Reserved, should be cleared.
28–31
THRADC0
[3:0]
ADC result Router for Threshold Bank address zero
The THRADC0[3:0] field controls the routing from the received ADC result to the Threshold Bank
address zero. Any ADC result which TAG matching THRADC0 will be routed to Threshold Bank.
Address: REACM_BASE (0xC3FC_7000) + 0x0010 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0
ADC_TAG[3:0]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
ADC_RESULT[15:0]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0