NXP Semiconductors MPC5644A, Reference Manual, Page: 275 / 1735

External Bus Interface (EBI)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 275
Chapter 14
External Bus Interface (EBI)
14.1 Information Specific to This Device
This section presents device-specific parameterization and customization information not specifically
referenced in the remainder of this chapter.
14.1.1 Device-Specific Features
• 3.3 V operation
• 24-bit address bus (2 most significant signals multiplexed with 2 chip selects)
• The MPC5644A MCU has only 16 data bus signals pinned out. The data bus can be multiplexed
with the address bus to have a 32-bit data width mode.
• Memory controller with support for various memory types:
— Asynchronous/legacy flash and SRAM
• Bus monitor
— User selectable
— Programmable timeout period (with 8 external bus clock resolution)
• Configurable wait states (via chip selects)
• Three chip-select (Cal_CS[0], Cal_CS[2:3]) signals (Multiplexed with 2 most significant address
signals) for the calibration bus. 4 chip selects for EBI
• Configurable bus speed modes
— system frequency
— 1/2 of system frequency
— 1/4 of system frequency
• Optional automatic CLKOUT gating to save power and reduce EMI
• Selectable drive strengths; 10 pF, 20 pF, 30 pF, 50 pF
• Note that the MPC5644A EBI implementation doesn’t support external arbitration
• Burst is supported in MPC5644A MCU only by the External Bus interface (not by the calibration
interface)
14.1.2 Unsupported Features
• External arbitration
14.2 Introduction
The External Bus Interface (EBI) provides an on-board interface for mapping external memory to the
MPC5644A microcontroller. The EBI includes a memory controller that generates interface signals to