
FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
1542
Freescale Semiconductor
33.6.5.2
Message buffer header field description
This section provides a detailed description of the usage and content of the message buffer header field. A
description of the structure of the message buffer header fields is given in
Section 33.6.2.1, Message buffer
”. Each message buffer header field consists of three sections: the frame header section, the
data field offset, and the slot status section. For a detailed description of the Data Field Offset, see
Section 33.6.2.1.2, Data field offset
33.6.5.2.1
Frame header description
Frame header content
The semantic and content of the frame header section depends on the message buffer type.
For individual receive message buffers and receive FIFOs, the frame header receives the frame header data
of the
first valid frame
received on the assigned channels.
For receive shadow buffers, the frame header receives the frame header data of the current frame received
regardless of whether the frame is valid or not.
For transmit message buffers, the application writes the frame header of the frame to be transmitted into
this location. The frame header will be read out when the frame is transferred to the FlexRay bus.
The structure of the frame header in the message buffer header field for receive message buffers and the
receive FIFO is given in
. A detailed description is given in
.
Figure 33-119. Frame header structure (receive message buffer and receive FIFO)
The structure of the frame header in the message buffer header field for transmit message buffers is given
in
. A detailed description is given in
. The checks that will be performed are
described in
Figure 33-120. Frame header structure (transmit message buffer)
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0x0
R
PPI
NUF
SYF
SUF
FID
0x2
0
0
CYCCNT
0
PLDLEN
0x4
0
0
0
0
0
HDCRC
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0x0
R
PPI
NUF
SYF
SUF
FID
0x2
CYCCNT
PLDLEN
0x4
HDCRC
= not used
= checked
= checked if static slot
Summary of Contents for MPC5644A
Page 2: ...MPC5644A Microcontroller Reference Manual Rev 6 2 Freescale Semiconductor...
Page 24: ...MPC5644A Microcontroller Reference Manual Rev 6 24 Freescale Semiconductor...
Page 26: ...MPC5644A Microcontroller Reference Manual Rev 6 26 Freescale Semiconductor...
Page 52: ...Introduction MPC5644A Microcontroller Reference Manual Rev 6 52 Freescale Semiconductor...
Page 56: ...Memory Map MPC5644A Microcontroller Reference Manual Rev 6 56 Freescale Semiconductor...
Page 1228: ...Decimation Filter MPC5644A Microcontroller Reference Manual Rev 6 1228 Freescale Semiconductor...
Page 1440: ...FlexCAN Module MPC5644A Microcontroller Reference Manual Rev 6 1440 Freescale Semiconductor...