NXP Semiconductors MPC5644A, Reference Manual, Page: 1441 / 1735

MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1441
Chapter 33
FlexRay Communication Controller (FlexRay)
33.1 Introduction
33.1.1 Reference
The following documents are referenced.
• FlexRay Communications System Protocol Specification, Version 2.1 Rev A
1
• FlexRay Communications System Electrical Physical Layer Specification, Version 2.1 Rev A
33.1.2 Glossary
This section provides a list of terms used in this chapter.
1. The FlexRay Specifications have been developed for automotive applications.The FlexRay Specifications have been neither
developed nor tested for non-automotive applications.
Table 33-1. List of terms
Term Definition
BCU Buffer Control Unit—Handles message buffer access
BMIF Bus Master Interface—Provides master access to FlexRay memory area
CC FlexRay Communication Controller—Module described in this chapter
CDC Clock Domain Crosser
CHI Controller Host Interface
Cycle length in µT The actual length of a cycle in µT for the ideal CC (+/- 0 ppm)
EBI External Bus Interface
FlexRay memory area Memory area to store the physical message buffer payload data, frame header, frame
andslot status, and synchronization frame related tables
System memory Memory that contains the FlexRay memory area
System Bus Bus that connects the CC and system memory
FSS Frame Start Sequence
HIF Host Interface—Provides host access to the CC
Host The FlexRay CC host CPU
LUT Look Up Table—Stores message buffer header index value
MB Message Buffer
MBIDX Message Buffer Index—The position of a header field entry within the header area. If the
header area is accessed as an array, this is the same as the array index of the entry.
MBNum Message Buffer Number—Position of message buffer configuration registers within the
register map. For example, Message Buffer Number 5 corresponds to the MBCCS5
register.