NXP Semiconductors MPC5644A, Reference Manual, Page: 1394 / 1735

FlexCAN Module
MPC5644A Microcontroller Reference Manual, Rev. 6
1394 Freescale Semiconductor
32.3.2 Signal descriptions
32.3.2.1 CAN RX
This pin is the receive pin from the CAN bus transceiver. Dominant state is represented by logic level ‘0’.
Recessive state is represented by logic level ‘1’.
32.3.2.2 CAN TX
This pin is the transmit pin to the CAN bus transceiver. Dominant state is represented by logic level ‘0’.
Recessive state is represented by logic level ‘1’.
32.4 Memory map/Register definition
This section describes the registers and data structures in the FlexCAN module. The base address of the
module depends on the particular memory map of the MCU. The addresses presented here are relative to
the base address.
The address space occupied by FlexCAN has 96 bytes for registers starting at the module base address,
followed by message buffer storage space in embedded RAM starting at address 0x0060, and an extra ID
Mask storage space in a separate embedded RAM starting at address 0x0880.
32.4.1 FlexCAN memory mapping
The complete memory map for a FlexCAN module with 64 message buffers capability is shown in
Table 32-2 . Each individual register is identified by its complete name and the corresponding mnemonic.
The access type can be Supervisor (S) or Unrestricted (U). Most of the registers can be configured to have
either Supervisor or Unrestricted access by programming MCR[SUPV]. These registers are identified as
S/U in the Access column of
Table 32-2 .
The IFRH and IMRH registers are considered reserved space when FlexCAN is configured with 16 or 32
message buffers. The Rx Global Mask (RXGMASK), Rx Buffer 14 Mask (RX14MASK) and the Rx
Buffer 15 Mask (RX15MASK) registers are provided for backwards compatibility, and are not used when
MCR[MBFEN] is asserted.
The address ranges 0x0060–0x047F and 0x0880–0x097F are occupied by two separate embedded
memories. These two ranges are completely occupied by RAM (1056 and 256 bytes, respectively) only
when FlexCAN is configured with 64 message buffers. When it is configured with 16 message buffers, the
memory sizes are 288 and 64 bytes, so the address ranges 0x0180–0x047F and 0x08C0–0x097F are
considered reserved space. When it is configured with 32 message buffers, the memory sizes are 544 and
128 bytes, so the address ranges 0x0280–0x047F and 0x0900–0x097F are considered reserved space.
Furthermore, if MCR[MBFEN] is negated, then the whole Rx Individual Mask Registers address range
(0x0880–0x097F) is considered reserved space.