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Deserial Serial Peripheral Interface (DSPI)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
1321
30.9.12 Continuous peripheral chip select
For peripherals that must remain selected between sequential serial transfers, the DSPI provides the option
of having the PCS signals asserted between transfers. For SPI transfers, the CONT bit in the SPI command
fields selects the continuous PCS feature. For DSI and CSI transfers, the DCONT bit in the DSPI_DSICR
selects the continuous PCS feature.
30.9.13 Peripheral chip select expansion and deglitching
The DSPI supports up to 256 Peripheral Chip Select Signals with the use of an external demultiplexer. Up
to 128 Peripheral Chip Select Signals can be used if deglitching is desired. The PCSS signal provides the
appropriate timing to enable and disable the demultiplexer for the DSPI_x_PCS[0:7] signals.
shows how an external 8-to-256 demultiplexer (on-board decoder) can be connected to the
DSPI.
Figure 30-54. DSPI PCS expansion and deglitching
30.9.14 DMA and interrupt conditions
The DSPI has six conditions that can generate interrupt requests and two conditions that can generate both
interrupt or DMA requests.
lists the conditions. The ‘x’ in the request type columns indicates
which signals are connected on the MPC5644A.
Table 30-40. DSPI interrupt and DMA request conditions
Condition
Flag
Request type
Interrupt
DMA
End of queue reached
EOQF
x
TX FIFO is not full
TFFF
x
x
Transfer of current frame complete
TCF
x
Attempt to transmit with an empty Transmit FIFO
TFUF
x
RX FIFO is not empty
RFDF
x
x
Frame received while Receive FIFO is full
RFOF
x
DSPI
PCS0-PCS7
PCSS
PCS0
PCS1
PCS256
8
Summary of Contents for MPC5644A
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