
Decimation Filter
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
1223
26.5.16.2 Cascade Mode Data/Control Bus description
A separate data bus is used to cascade the filters. The bus content is presented in
signals descriptions are present below.
Cascade Middle and Tail blocks do not make input feed requests, either on PSI or slave-bus interfaces.
Similarly, cascade Head and Middle block do not make filtered (not integrator) output data requests, either
on PSI or slave-bus interfaces.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
DFCIN/OUT_ST
OP
D
F
CIN/OUT_REQ
Reserved
DFCIN/OUT_FLUSH
DFCIN/OUT
_CTRL[1:0]
Res.
DFCIN/OUT_TAG[3:0]
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
DFCIN/OUT_DATA[15:0]
Figure 26-23. Decimation filter cascade mode data bus
Table 26-30. Decimation filter cascade mode data bus field description
Field
Description
0
DFCIN/OUT_STOP
Decimation Filter Cascade Input/Output Stop flag
The DFCIN/OUT_STOP bit indicates that a cascade bus driver block in a cascade
configuration is stopped. When the block is configured as Cascade Middle or Tail, it only
stops when this bit is asserted.
1
DFCIN/OUT_REQ
Decimation Filter Cascade Request
The DFCIN/OUT_REQ bit indicates that a cascade bus driver block in a cascade
configuration has data ready to be sent. The driven block responds to the request asserting
its decfil_cascade_ack signal at the same time it copies the relevant cascade data bus fields.
8
DFCIN/OUT_FLUSH
Decimation Filter Cascade Input/Output Flush control bit
The DFCIN/OUT_FLUSH bit indicates to the receiver Decimation Filter block that it should
execute a flush command — thus some internal registers are placed in the initial state.
9-10
DFCIN/OUT_CTRL
[1:0]
Decimation Filter Cascade Input/Output Control bits
The DFCIN/OUT_CTRL[1:0] field has the same function as the M_CTRL[1:0] control bits
described in
. This field defines the operation to be executed with the
DFCIN/OUT_DATA[15:0] data.
12-15
DFCIN/OUT_TAG
[3:0]
Decimation Filter Cascade Input/Output Tag bits
The DFCIN/OUT_TAG[3:0] field indicates the destination associated with the
DFCIN/OUT_DATA[15:0] data. This value is stored by the Decimation Filter and used to
address the destination register when a decimated sample is available to be read by the
master block.
DFCIN/OUT_DATA
[15:0]
Decimation Filter Cascade Input/Output Data
The DFCIN/OUT_DATA[15:0] bit field carries the data to be transmitted in the chain of
cascaded decimation filter blocks.
Summary of Contents for MPC5644A
Page 2: ...MPC5644A Microcontroller Reference Manual Rev 6 2 Freescale Semiconductor...
Page 24: ...MPC5644A Microcontroller Reference Manual Rev 6 24 Freescale Semiconductor...
Page 26: ...MPC5644A Microcontroller Reference Manual Rev 6 26 Freescale Semiconductor...
Page 52: ...Introduction MPC5644A Microcontroller Reference Manual Rev 6 52 Freescale Semiconductor...
Page 56: ...Memory Map MPC5644A Microcontroller Reference Manual Rev 6 56 Freescale Semiconductor...
Page 1228: ...Decimation Filter MPC5644A Microcontroller Reference Manual Rev 6 1228 Freescale Semiconductor...
Page 1440: ...FlexCAN Module MPC5644A Microcontroller Reference Manual Rev 6 1440 Freescale Semiconductor...