NXP Semiconductors MPC5644A, Reference Manual, Page: 1193 / 1735

Decimation Filter
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1193
26.4.2.5 Decimation Filter Interface Input Buffer Register (DECFILTER_IB)
The Input Buffer Register provides access to the Input buffer of the decimation filter when the filter is in
the standalone or PSI output mixed modes of operation. Writes to this register are interpreted as requests
to the Decimation Filter to process new sample data. Writes to this register when ISEL = 0 are not allowed.
30
SCOVF
Integrator Count Overflow Flag. The SCOVF bit flag indicates an overflow of the internal
integrated sample counter. This Flag is cleared by the SCOVFC bit or by a soft reset.
1 Integrator sample counter overflown.
0 No overflow in the integrator sample counter.
Note: The SCOVF bit samples the integrator accumulator overflow condition when and only
when either registers DECFILTER_FINTVAL or DECFILTER_CINTCNT are updated.
Therefore, only one of the register pairs (DECFILTER_FINTVAL/DECFILTER_FINTCNT
and DECFILTER_CINTVAL/DECFILTER_CINTCNT) must be used by the application, in
order to avoid races.
31
SVR
Integrator Data Overrun. The SVR bit indicates that an integration value and count in the
registers DECFILTER_FINTVAL and DECFILTER_FINTCNT was overwritten by a new
integrator output request and was not read by the CPU or DMA. This flag generates an Interrupt
Request if enabled by the ERREN bit in the Configuration Register. This Flag is cleared by the
SVRC bit or by a soft reset.
1 Integrator Data Overrun occurred.
0 Integrator Data Overrun did not occur.
Address: DECFILTE 0x010 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
INTAG[3:0]
0 0 0 0 0 0
PREFILL
FL
USH
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
INPBUF[15:0]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 26-6. Decimation Filter Interface Input Buffer Register (DECFILTER_IB)
Table 26-18. DECFILTER_IB Register Field Descriptions
Field Description
0–3 Reserved, should be cleared.
4–7
INTAG[3:0]
Decimation filter input tag bits
The INTAG[3:0] bit field is defined as a selector signal and it is used to identify different
destinations for the INBUF[15:0] data.
When the PSI master block is an eQADC, it is used in PSI output mixed mode to address the
appropriate RFIFO in the eQADC block.
Table 26-17. DECFILTER_MXSR Register Field Descriptions (continued)
Field Description