NXP Semiconductors MPC5605BK, Reference Manual

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Chapter 26 Deserial Serial Peripheral Interface (DSPI)
MPC5606BK Microcontroller Reference Manual, Rev. 2
614 Freescale Semiconductor
26.5.7 DSPI PUSH TX FIFO Register (DSPI x _PUSHR)
The DSPI x _PUSHR provides a means to write to the TX FIFO. Data written to this register is transferred
to the TX FIFO. See Section 26.6.3.4, Transmit First In First Out (TX FIFO) buffering mechanism , for
more information. Write accesses of 8 or 16 bits to the DSPI x _PUSHR transfers 32 bits to the TX FIFO.
NOTE
TXDATA is used in master and slave modes.
RFOF_RE Receive FIFO overflow request enable
Enables the RFOF flag in the DSPI
x _SR to generate an interrupt requests.
0 RFOF interrupt requests are disabled
1 RFOF interrupt requests are enabled
RFDF_RE Receive FIFO drain request enable
Enables the RFDF flag in the DSPI
x _SR to generate a request. The RFDF_DIRS bit selects between
generating an interrupt request or a DMA request.
0 RFDF interrupt requests or DMA requests are disabled
1 RFDF interrupt requests or DMA requests are enabled
RFDF_DIRS Receive FIFO drain DMA or interrupt request select
Selects between generating a DMA request or an interrupt request. When the RFDF flag bit in the
DSPI
x _SR is set, and the RFDF_RE bit in the DSPI x _RSER is set, the RFDF_DIRS bit selects
between generating an interrupt request or a DMA request.
0 Interrupt request is selected
1 DMA request is selected
Offset:0x34 Access: Read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
CON
T
CTAS EOQ
CTCNT
0 0
0 0
PCS5 PCS4 PCS3 PCS2 PCS1 PCS0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
TXDATA
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 26-8. DSPI PUSH TX FIFO Register (DSPI x _PUSHR)
Table 26-19. DSPIx_RSER field descriptions (continued)
Field Description