NXP Semiconductors MPC5605BK, Reference Manual

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Chapter 24 LIN Controller (LINFlexD)
MPC5606BK Microcontroller Reference Manual, Rev. 2
490 Freescale Semiconductor
SBDT Slave Mode Break Detection Threshold
0: 11-bit break
1: 10-bit break
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
RBLM Receive Buffer Locked Mode
0: Receive Buffer not locked on overrun. Once the Slave Receive Buffer is full the next incoming
message overwrites the previous one.
1: Receive Buffer locked against overrun. Once the Receive Buffer is full the next incoming message
is discarded.
Note: This bit can be written in Initialization mode only. It is read-only in Normal or Sleep mode.
SLEEP Sleep Mode Request
This bit is set by software to request LINFlexD to enter Sleep mode.
This bit is cleared by software to exit Sleep mode or by hardware if the AWUM bit in LINCR1 and the
WUF bit in LINSR are set (see
Table 24-12 ).
INIT Initialization Request
The software sets this bit to switch hardware into Initialization mode. If the SLEEP bit is reset,
LINFlexD enters Normal mode when clearing the INIT bit (see
Table 24-12 ).
Table 24-10. Checksum bits configuration
CFD CCD LINCFR Checksum sent
1 1 Read/Write None
1 0 Read-only None
0 1 Read/Write Programmed in LINCFR by bits CF[0:7]
0 0 Read-only Hardware calculated
Table 24-11. LIN master break length selection
MBL Length
0000 10-bit
0001 11-bit
0010 12-bit
0011 13-bit
0100 14-bit
0101 15-bit
0110 16-bit
0111 17-bit
1000 18-bit
1001 19-bit
1010 20-bit
Table 24-9. LINCR1 field descriptions (continued)
Field Description