NXP Semiconductors MPC5605BK, Reference Manual

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Chapter 20 System Integration Unit Lite (SIUL)
MPC5606BK Microcontroller Reference Manual, Rev. 2
366 Freescale Semiconductor
CAUTION
Toggling several IOs at the same time can significantly increase the current in a pad group. Caution must
be taken to avoid exceeding maximum current thresholds. Please see data sheet.
20.5.3.11 GPIO Pad Data Input Registers (GPDI0_3–GPDI148_151)
These registers are used to read the GPIO pad data with a byte access.
Offsets: 0x0600–0x06A0 (38 registers) Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0
PDO[0]
0 0 0 0 0 0 0
PDO[1]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0
PDO[2]
0 0 0 0 0 0 0
PDO[3]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 20-11. Port GPIO Pad Data Output Register 0–3 (GPDO0_3)
Table 20-14. GPDO0_3 field descriptions
Field Description
PDO[x] Pad Data Out
This bit stores the data to be driven out on the external GPIO pad controlled by this register.
0 Logic low value is driven on the corresponding GPIO pad when the pad is configured as an
output
1 Logic high value is driven on the corresponding GPIO pad when the pad is configured as an
output