NXP Semiconductors MPC5605BK, Reference Manual

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Chapter 6 Clock Description
MPC5606BK Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 123
• MOD_PERIOD, INC_STEP, SPREAD_SEL bits should be modified before activating the FM
mode. Then strobe has to be generated to enable the new settings. If STRB_BYP is set to 1 then
MOD_PERIOD, INC_STEP, and SPREAD_SEL can be modified only when FMPLL is in
powerdown mode.
6.8 Clock monitor unit (CMU)
6.8.1 Introduction
The Clock Monitor Unit (CMU), also referred to as Clock Quality Checker or Clock Fault Detector, serves
two purposes. The main task is to permanently supervise the integrity of the various clock sources, for
example a crystal oscillator or FMPLL. In case the FMPLL leaves an upper or lower frequency boundary
or the crystal oscillator fails it can detect and forward these kind of events to the MC_ME and the
MC_CGM. The clock management unit in turn can then switch to a SAFE mode where it uses the default
safe clock source (FIRC), resets the device, or generates the interrupt according to the system needs.
It can also monitor the external crystal oscillator clock, which must be greater than the internal RC clock
divided by a division factor given by CMU_CSR[RCDIV], and generates a system clock transition request
or an interrupt when enabled.
The second task of the CMU is to provide a frequency meter, which allows to measure the frequency of
one clock source vs. a reference clock. This is useful to allow the calibration of the on-chip RC
oscillator(s), as well as being able to correct/calculate the time deviation of a counter that is clocked by the
RC oscillator.
6.8.2 Main features
• FIRC, SIRC, SXOSC oscillator frequency measurement using FXOSC as reference clock
• External oscillator clock monitoring with respect to FIRC_clk/n clock
• FMPLL clock frequency monitoring for a high and low frequency range with FIRC as reference
clock
• Event generation for various failures detected inside monitoring unit