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Nexus
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor
25-29
•
Data trace via data write messaging (DWM) and data read messaging (DRM). This provides the
capability for the development tool to trace reads and/or writes to selected internal memory
resources.
•
Ownership trace via ownership trace messaging (OTM). OTM facilitates ownership trace by
providing visibility of which process ID or operating system task is activated. An ownership trace
message is transmitted when a new process/task is activated, allowing the development tool to
trace ownership flow.
•
Run-time access to embedded processor registers and memory map via the JTAG port. This allows
for enhanced download/upload capabilities.
•
Watchpoint messaging via the auxiliary pins.
•
Watchpoint trigger enable of program and/or data trace messaging.
•
High-speed data input/output via the auxiliary port.
•
Auxiliary interface for higher data input/output
— Configurable (minimum and maximum) message data out pins (
nex_mdo[n:0]
)
— One or two message start/end out pins (
nex_mseo_b[1:0]
)
— One read/write ready pin (
nex_rdy_b
) pin
— One watchpoint-event pin (
nex_evto_b
)
— One event-in pin (
nex_evti_b
)
— One MCKO (message clock out) pin
•
Registers for program trace, data trace, ownership trace and watchpoint trigger.
•
All features controllable and configurable via the JTAG port.
25.10.5 Enabling Nexus3 Operation
The Nexus module is enabled by loading a single instruction (ACCESS_AUX_TAP_ONCE, as shown in
) into the JTAGC instruction register (IR), and then loading the corresponding OnCE OCMD
register with the NEXUS3_ACCESS instruction (refer to
). For the e200z6 Class 3 Nexus
module, the OCMD value is 0b00_0111_1100. After it is enabled, the module is ready to accept control
input via the JTAG pins.
Refer to
Section 25.7, “NPC Functional Description
” for more information.
The Nexus module is disabled when the JTAG state machine reaches the test-logic-reset state. This state
can be reached by asserting the JCOMP pin or cycling through the state machine using the TMS pin. The
Nexus module is also disabled if a power-on-reset (POR) event occurs. If the Nexus3 module is disabled,
no trace output is provided, and the module disables (drive inactive) auxiliary port output pins MDO[n:0],
MSEO[1:0], MCKO. Nexus registers are not available for reads or writes.
Summary of Contents for MPC5566
Page 81: ...Introduction MPC5566 Microcontroller Reference Manual Rev 2 1 24 Freescale Semiconductor...
Page 135: ...Signal Description MPC5566 Microcontroller Reference Manual Rev 2 2 54 Freescale Semiconductor...
Page 189: ...Reset MPC5566 Microcontroller Reference Manual Rev 2 4 20 Freescale Semiconductor...
Page 603: ...Flash Memory MPC5566 Microcontroller Reference Manual Rev 2 13 38 Freescale Semiconductor...
Page 609: ...SRAM MPC5566 Microcontroller Reference Manual Rev 2 14 6 Freescale Semiconductor...
Page 1073: ...MPC5566 Microcontroller Reference Manual Rev 2 22 36 Freescale Semiconductor...
Page 1185: ...Nexus MPC5566 Microcontroller Reference Manual Rev 2 25 92 Freescale Semiconductor...