NXP Semiconductors MKW01Z128, Reference Manual

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Sub 1 GHz Transceiver Architecture Description
MKW01xxRM Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 5-15
The default value of DccFreq cutoff frequency is typically 4% of the RxBw (channel filter BW). The cutoff
frequency of the DCC can however be increased to slightly improve the sensitivity under wider
modulation conditions. It is advised to adjust the DCC setting while monitoring the receiver sensitivity.
5.7.7 Complex Filter - OOK
In OOK mode the receiver is modified to a low-IF architecture. The IF frequency is automatically set to
half the single side bandwidth of the channel filter (F
IF
= 0.5 * RxBw ). The Local Oscillator is
automatically offset by the IF in the OOK receiver. A complex filter is implemented on the chip to
attenuate the resulting image frequency by typically 30 dB.
NOTE
This filter is automatically bypassed when receiving FSK signals
(ModulationType = 00 in RegDataModul).
5.7.8 RSSI
The RSSI block evaluates the amount of energy available within the receiver channel bandwidth. Its
resolution is 0.5 dB, and it has a wide dynamic range to accommodate both small and large signal levels
that may be present. Its acquisition time is very short, taking only 2 bit periods. The RSSI sampling must
occur during the reception of preamble in FSK, and constant “1” reception in OOK.
101 0.5
110 0.25
111 0.125
Table 5-6. Available DCC Cutoff Frequencies Expressed as Percentage of RXBW (continued)
DccFreq in RegRxBw fc in % of RxBw