NXP Semiconductors MKW01Z128, Reference Manual

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RTC_CR field descriptions (continued)
Field Description
23–15
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
14
Reserved
This field is reserved.
It must always be written to 0.
13
SC2P
Oscillator 2pF Load Configure
0 Disable the load.
1 Enable the additional load.
12
SC4P
Oscillator 4pF Load Configure
0 Disable the load.
1 Enable the additional load.
11
SC8P
Oscillator 8pF Load Configure
0 Disable the load.
1 Enable the additional load.
10
SC16P
Oscillator 16pF Load Configure
0 Disable the load.
1 Enable the additional load.
9
CLKO
Clock Output
0 The 32 kHz clock is output to other peripherals.
1 The 32 kHz clock is not output to other peripherals.
8
OSCE
Oscillator Enable
0 32.768 kHz oscillator is disabled.
1 32.768 kHz oscillator is enabled. After setting this bit, wait the oscillator startup time before enabling
the time counter to allow the 32.768 kHz clock time to stabilize.
7–5
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
4
WPS
Wakeup Pin Select
The wakeup pin is optional and not available on all devices.
0 Wakeup pin asserts (active low, open drain) if the RTC interrupt asserts or the wakeup pin is turned
on.
1 Wakeup pin instead outputs the RTC 32kHz clock, provided the wakeup pin is turned on and the
32kHz clock is output to other peripherals.
3
UM
Update Mode
Allows SR[TCE] to be written even when the Status Register is locked. When set, the SR[TCE] can always
be written if the SR[TIF] or SR[TOF] are set or if the SR[TCE] is clear.
0 Registers cannot be written when locked.
1 Registers can be written when locked under limited conditions.
2
SUP
Supervisor Access
0 Non-supervisor mode write accesses are not supported and generate a bus error.
1 Non-supervisor mode write accesses are supported.
Table continues on the next page...
Register definition
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
568 Freescale Semiconductor, Inc.