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DMA_DCRn field descriptions (continued)
Field
Description
10
16-bit
11
Reserved (generates a configuration error (DSRn[CE]) if incorrectly specified at time of channel
activation)
19
DINC
Destination Increment
Controls whether the destination address increments after each successful transfer.
0
No change to the DAR after a successful transfer.
1
The DAR increments by 1, 2, 4 depending upon the size of the transfer.
18–17
DSIZE
Destination Size
Determines the data size of the destination bus cycle for the DMA controller.
00
32-bit
01
8-bit
10
16-bit
11
Reserved (generates a configuration error (DSRn[CE]) if incorrectly specified at time of channel
activation)
16
START
Start Transfer
0
DMA inactive
1
The DMA begins the transfer in accordance to the values in the TCDn. START is cleared
automatically after one module clock and always reads as logic 0.
15–12
SMOD
Source Address Modulo
Defines the size of the source data circular buffer used by the DMA Controller. If enabled (SMOD is non-
zero), the buffer base address is located on a boundary of the buffer size. The value of this boundary is
based upon the initial source address (SAR). The base address should be aligned to a 0-modulo-(circular
buffer size) boundary. Misaligned buffers are not possible. The boundary is forced to the value determined
by the upper address bits in the field selection.
0000
Buffer disabled
0001
Circular buffer size is 16 bytes.
0010
Circular buffer size is 32 bytes.
0011
Circular buffer size is 64 bytes.
0100
Circular buffer size is 128 bytes.
0101
Circular buffer size is 256 bytes.
0110
Circular buffer size is 512 bytes.
0111
Circular buffer size is 1 KB.
1000
Circular buffer size is 2 KB.
1001
Circular buffer size is 4 KB.
1010
Circular buffer size is 8 KB.
1011
Circular buffer size is 16 KB.
1100
Circular buffer size is 32 KB.
1101
Circular buffer size is 64 KB.
1110
Circular buffer size is 128 KB.
1111
Circular buffer size is 256 KB.
11–8
DMOD
Destination Address Modulo
Defines the size of the destination data circular buffer used by the DMA Controller. If enabled (DMOD
value is non-zero), the buffer base address is located on a boundary of the buffer size. The value of this
Table continues on the next page...
Chapter 19 DMA Controller Module
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc.
327
Summary of Contents for MKW01Z128
Page 7: ...MKW01xxRM Reference Manual Rev 3 04 2016 viii Freescale Semiconductor Inc...
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Page 133: ...MKW01Z128 MCU Reference Manual Rev 3 04 2016 2 Freescale Semiconductor Inc...
Page 233: ...Module clocks MKW01Z128 MCU Reference Manual Rev 3 04 2016 102 Freescale Semiconductor Inc...
Page 513: ...Interrupts MKW01Z128 MCU Reference Manual Rev 3 04 2016 382 Freescale Semiconductor Inc...
Page 633: ...CMP Trigger Mode MKW01Z128 MCU Reference Manual Rev 3 04 2016 502 Freescale Semiconductor Inc...