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Universal Serial Bus Interface
MCF5253 Reference Manual, Rev. 1
Freescale Semiconductor
24-137
24.11.3.5 Control Endpoint Operation Model
24.11.3.5.1
Setup Phase
All requests to a control endpoint begin with a setup phase followed by an optional data phase and a
required status phase. The USB_DR will always accept the setup phase unless the setup lockout is
engaged.
The setup lockout will engage so that future setup packets are ignored. Lockout of setup packets ensures
that while the software is reading the setup packet stored in the queue head, that data is not written as it is
being read potentially causing an invalid setup packet.
The setup lockout mechanism can be disabled and a tripwire type semaphore will ensure that the setup
packet payload is extracted from the queue head without being corrupted be an incoming setup packet.
This is the preferred behavior because ignoring repeated setup packets due to long software interrupt
latency would be a compliance issue.
Setup Packet Handling
•
Disable Setup Lockout by writing '1' to Setup Lockout Mode (SLOM) in USBMODE. (once at
initialization). Setup lockout is not necessary when using the tripwire as described below.
NOTE
Leaving the Setup Lockout Mode As '0' will result in a potential compliance
issue.
•
After receiving an interrupt and inspecting ENDPTSETUPSTAT to determine that a setup packet
was received on a particular pipe:
— Write '1' to clear corresponding bit ENDPTSETUPSTAT.
— Write '1' to Setup Tripwire (SUTW) in USBCMD register.
— Duplicate contents of dQH.SetupBuffer into the local software byte array.
— Read Setup TripWire (SUTW) in USBCMD register. (if set
—
continue; if cleared
—
goto 2)
— Write '0' to clear Setup Tripwire (SUTW) in USBCMD register.
— Process setup packet using the local software byte array copy and execute status/handshake
phases.
Note: After receiving a new setup packet the status and/or handshake phases may still be pending
from a previous control sequence. These should be flushed and de-allocated before linking a new
status and/or handshake dTD for the most recent setup packet.
24.11.3.5.2
Data Phase
Following the setup phase, the DCD must create a device transfer descriptor for the data phase and prime
the transfer.
After priming the packet, the DCD must verify a new setup packet has not been received by reading the
ENDPTSETUPSTAT register immediately verifying that the prime had completed. A prime will complete
when the associated bit in the ENDPTPRIME register is zero and the associated bit in the ENDPTSTATUS
register is a one. If a prime fails, that is, The ENDPTPRIME bit goes to zero and the ENDPTSTATUS bit
Summary of Contents for MCF5253
Page 1: ...Document Number MCF5253RM Rev 1 08 2008 MCF5253 Reference Manual...
Page 26: ...MCF5253 Reference Manual Rev 1 xxvi Freescale Semiconductor...
Page 32: ...MCF5253 Reference Manual Rev 1 xxxii Freescale Semiconductor...
Page 46: ...MCF5253 Introduction MCF5253 Reference Manual Rev 1 1 14 Freescale Semiconductor...
Page 62: ...Signal Description MCF5253 Reference Manual Rev 1 2 16 Freescale Semiconductor...
Page 98: ...Instruction Cache MCF5253 Reference Manual Rev 1 5 10 Freescale Semiconductor...
Page 104: ...Static RAM SRAM MCF5253 Reference Manual Rev 1 6 6 Freescale Semiconductor...
Page 128: ...Synchronous DRAM Controller Module MCF5253 Reference Manual Rev 1 7 24 Freescale Semiconductor...
Page 144: ...Bus Operation MCF5253 Reference Manual Rev 1 8 16 Freescale Semiconductor...
Page 176: ...System Integration Module SIM MCF5253 Reference Manual Rev 1 9 32 Freescale Semiconductor...
Page 198: ...Analog to Digital Converter ADC MCF5253 Reference Manual Rev 1 12 6 Freescale Semiconductor...
Page 246: ...DMA Controller MCF5253 Reference Manual Rev 1 14 18 Freescale Semiconductor...
Page 282: ...UART Modules MCF5253 Reference Manual Rev 1 15 36 Freescale Semiconductor...
Page 344: ...Audio Interface Module AIM MCF5253 Reference Manual Rev 1 17 46 Freescale Semiconductor...
Page 362: ...I2 C Modules MCF5253 Reference Manual Rev 1 18 18 Freescale Semiconductor...
Page 370: ...Boot ROM MCF5253 Reference Manual Rev 1 19 8 Freescale Semiconductor...