NXP Semiconductors MC9S08PA4, Reference Manual

Page: 35 / 401

2.3 Peripheral pinouts
These MCUs support up to 18 general-purpose I/O pins, which are shared with on-chip
peripheral functions (FTM, ACMP, ADC, SCI, KBI, etc.). These 18 general-purpose I/O
pins include one output-only pin (PTA4).
When a port pin is configured as general-purpose input, or when a peripheral uses the
port pin as an input, the software can enable a pullup device.
When a high current drive port pin is configured as general-purpose output or when a
peripheral uses the port pin as an output, software can select alternative drive strengths.
For information about controlling these pins as general-purpose I/O pins, see the Parallel
input/output . For information about how and when on-chip peripheral systems use these
pins, see the appropriate module chapter.
Immediately after reset, all pins are configured as high-impedance general-purpose IO
with internal pullup devices disabled.
Table 2-1. Pin availability by package pin-count
Pin Number Lowest Priority <-- --> Highest
20-SOIC 16-TSSOP 8-DFN Port Pin Alt 1 Alt 2 Alt 3 Alt 4
1 1 1 PTA5 IRQ FTM1CH0 — RESET
2 2 2 PTA4 — ACMPO BKGD MS
3 3 3 — — — — V
DD
4 4 4 — — — — V
SS
5 5 — PTB7 — — — EXTAL
6 6 — PTB6 — — — XTAL
7 7 — PTB5
-1
— FTM1CH1 — —
8 8 — PTB4
-1
— FTM1CH0 — —
9 — — PTC3 — — — —
10 — — PTC2 — — — —
11 — — PTC1 — — — —
12 — — PTC0 — — — —
13 9 — PTB3 KBI0P7 — TCLK1 ADP7
14 10 — PTB2 KBI0P6 — — ADP6
15 11 — PTB1 KBI0P5 TxD0 — ADP5
16 12 — PTB0
3
KBI0P4 RxD0 TCLK0 ADP4
17 13 5 PTA3 KBI0P3 FTM0CH1 TxD0 ADP3
18 14 6 PTA2 KBI0P2 FTM0CH0 RxD0 ADP2
19 15 7 PTA1 KBI0P1 FTM0CH1 ACMP1 ADP1
20 16 8 PTA0 KBI0P0 FTM0CH0 ACMP0 ADP0
Chapter 2 Pins and connections
MC9S08PA4 Reference Manual, Rev. 5, 08/2017
NXP Semiconductors 35