NXP Semiconductors MC9S08LG16, Reference Manual

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Chapter 2 Pins and Connections
MC9S08LG32 MCU Series, Rev. 5
Freescale Semiconductor 35
as the bus clock, so no significant capacitance must be connected to the BKGD/MS pin that could interfere
with background serial communications.
Although the BKGD/MS pin is a pseudo open-drain pin, the background debug communication protocol
provides brief, actively driven, high speedup pulses to ensure fast rise times. Small capacitances from
cables and the absolute value of the internal pullup device play a minimal role in determining rise and fall
times on the BKGD/MS pin.
NOTE
Ensure this pin is not low when the part is coming out of POR or BDFR
reset. Exit from stop2 causes POR, therefore POR includes the exit from
stop2. Because the pin defaults to BKGD/MS function out of reset, a low
value on this pin while coming out of POR or BDFR causes the part to boot
into BDM mode. If this pin is not being used at all, it must be tied high. A
pullup is recommended when using this pin as GPIO.
2.3.5 IRQ
The PTF2/IRQ pin can be used as a wakeup source for the MCU. For stop2 wakeup, this pin has an analog
path which is enabled based on the input buffer enable for this pin, irrespective of whether or not this pin
is configured as IRQ.
NOTE
Care needs to be taken that if this pin is configured as input, it is not low
during stop2 mode, otherwise the part exits stop2 mode irrespective of
whether this pin is configured as IRQ or not. This pin can be disabled as a
wakeup source if it is configured as an output.
2.3.6 LCD Pins
2.3.6.1 LCD Power Pins
The V
LL1
, V
LL2
, V
LL3
, V
cap1
, and V
cap2
pins are dedicated to providing power to the LCD module. On
64-pin and 80-pin packages the V
LL3_2
pin must be tied to V
LL3
on board. For more information about
LCD pins, see Chapter 9, “LCD Module (S08LCDLPV1) .”
2.3.6.2 LCD Driver Pins
The MC9S08LG32 series of MCUs provide 45 LCD driver pins for the 80-pin packages, 37 pins for the
64-pin packages, and 29 pins for the 48-pin packages. Each LCD pin has pin enable control, so you can
choose to use any LCD pin as either LCD driver or GPIO. If the LCD module is disabled, the LCD driver
pins become high-impedance and the LCD/GPIO pins are configured as GPIO. The LCD pins are
open-drain after resets except for stop2 wakeup. For more information about LCD driver pins, see
Chapter 9, “LCD Module (S08LCDLPV1) .”
Pins that have shared function with the LCD have special behavior based on the state of the VSUPPLY
bits in the LCDSUPPLY register. These pins can operate as full complementary drive or open drain drive