UM11029
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User manual
Rev. 1.0 — 16 June 2017
353 of 515
NXP Semiconductors
UM11029
Chapter 19: LPC84x I2C0/1/2/3
19.6.15 Monitor data register
The read-only MONRXDAT register provides information about events on the I
2
C bus,
primarily to facilitate debugging of the I
2
C during application development. All data
addresses and data passing on the bus and whether these were acknowledged, as well
as Start and Stop events, are reported.
The Monitor function must be enabled by the MONEN bit in the CFG register. Monitor
mode can be configured to stretch the I
2
C clock if data is not read from the MONRXDAT
register in time to prevent it, via the MONCLKSTR bit in the CFG register. This can help
ensure that nothing is missed but can cause the monitor function to be somewhat intrusive
(by potentially adding clock delays, depending on software or DMA response time). In
order to improve the chance of collecting all Monitor information if clock stretching is not
enabled, Monitor data is buffered such that it is available until the end of the next piece of
information from the I
2
C bus.
Table 366. Slave address Qualifier 0 register (SLVQUAL0, address 0x4005 0058 (I2C0),
0x4005 4058 (I2C1), 0x4003 0058 (I2C2), 0x4003 4058 (I2C3)) bit description
Bit
Symbol
Value Description
Reset
Value
0
QUALMODE0
Reserved. Read value is undefined, only zero should be
written.
0
0
The SLVQUAL0 field is used as a logical mask for
matching address 0.
1
The SLVQUAL0 field is used to extend address 0
matching in a range of addresses.
7:1
SLVQUAL0
Slave address Qualifier for address 0. A value of 0 causes
the address in SLVADR0 to be used as-is, assuming that
it is enabled.
If QUALMODE0 = 0, any bit in this field which is set to 1
will cause an automatic match of the corresponding bit of
the received address when it is compared to the
SLVADR0 register.
If QUALMODE0 = 1, an address range is matched for
address 0. This range extends from the value defined by
SLVADR0 to the address defined by SLVQUAL0 (address
matches when SLVADR0[7:1] <= received address <=
SLVQUAL0[7:1]).
0
31:8
-
Reserved. Read value is undefined, only zero should be
written.
NA
Table 367. Monitor data register (MONRXDAT, address 0x4005 0080 (I2C0), 0x4005 4080
(I2C1), 0x4003 0080 (I2C2), 0x4003 4080 (I2C3)) bit description
Bit
Symbol
Value Description
Reset
value
7:0
MONRXDAT
Monitor function Receiver Data. This reflects every data
byte that passes on the I
2
C pins, and adds indication of
Start, Repeated Start, and data NACK.
0
