NXP Semiconductors LPC84x, User Manual

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User manual Rev. 1.0 — 16 June 2017 257 of 515
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Chapter 15: LPC84x Reduced power modes and power management
15.7.6.2 Programming power-down mode
The following steps must be performed to enter power-down mode:
1. The PM bits in the PCON register must be set to 0x2 ( Table 291 ).
2. Select the power configuration in power-down mode in the PDSLEEPCFG
( Table 170 ) register.
3. Select the power configuration after wake-up in the PDAWAKECFG ( Table 171 )
register.
4. If any of the available wake-up interrupts are used for wake-up, enable the interrupts
in the interrupt wake-up registers ( Table 168 , Table 169 ) and in the NVIC.
5. Select the FRO as the main clock. See Table 137 .
6. Write one to the SLEEPDEEP bit in the ARM Cortex-M0+ SCR register ( Table 288 ).
7. Use the ARM WFI instruction.
15.7.6.3 Wake-up from power-down mode
The microcontroller can wake up from power-down mode in the same way as from
deep-sleep mode:
•
Signal on one of the eight pin interrupts selected in Table 167 . Each pin interrupt must
also be enabled in the STARTERP0 register ( Table 168 ) and in the NVIC.
•
BOD signal, if the BOD is enabled in the PDSLEEPCFG register:
–
BOD interrupt using the interrupt wake-up register 1 ( Table 169 ). The BOD
interrupt must be enabled in the NVIC. The BOD interrupt must be selected in the
BODCTRL register.
–
Reset from the BOD circuit. In this case, the BOD reset must be enabled in the
BODCTRL register (
Table 163 ).
•
WWDT signal, if the watchdog oscillator is enabled in the PDSLEEPCFG register:
–
WWDT interrupt using the interrupt wake-up register 1 ( Table 169 ). The WWDT
interrupt must be enabled in the NVIC. The WWDT interrupt must be set in the
WWDT MOD register.
–
Reset from the watchdog timer. The WWDT reset must be set in the WWDT MOD
register.
–
Via any of the USART blocks. See Section 17.3.2 “Configure the USART for
wake-up” .
–
Via the I2C. See Section 19.3.3 .
–
Via any of the SPI blocks. See Section 18.3.1 .
Remark:
If the BOD is enabled in active mode and the user needs to disable the BOD
in deep-sleep mode, disable the BOD reset (bit 4 in the BODCTRL register) before
entering power-down mode. After wake-up, enable the BOD reset (bit 4 in the
BODCTRL register).
15.7.7 Deep power-down mode
In deep power-down mode, power and clocks are shut off to the entire chip with the
exception of the WAKEUP pin, RESET pin, and the self-wake-up timer.