NXP Semiconductors LPC84x, User Manual

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User manual Rev. 1.0 — 16 June 2017 215 of 515
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Chapter 13: LPC84x Pin interrupts/pattern match engine
–
Enable the clock to the pin interrupt register block in the SYSAHBCLKCTRL
register (
Table 146 , bit 28).
–
Each bit slice of the pattern match engine is assigned to one interrupt in the NVIC
(interrupts #24 to #31 for slices 0 to 7).
–
The combined interrupt from all slices or slice combinations can be connected to
the ARM RXEV request and to pin function GPIO_INT_BMAT through the switch
matrix movable function register (PINASSIGN11,
Table 191 ).
13.3.1 Configure pins as pin interrupts or as inputs to the pattern match
engine
Follow these steps to configure pins as pin interrupts:
1. Determine the pins that serve as pin interrupts on the LPC84x package. See the data
sheet for determining the GPIO port pin number associated with the package pin.
2. For each pin interrupt, program the GPIO port pin number into one of the eight
PINTSEL registers in the SYSCON block.
Remark:
The port pin number serves to identify the pin to the PINTSEL register. Any
function, including GPIO, can be assigned to this pin through the switch matrix.
3. Enable each pin interrupt in the NVIC.
Once the pin interrupts or pattern match inputs are configured, you can set up the pin
interrupt detection levels or the pattern match boolean expression.
See Section 8.6.42 “Pin interrupt select registers” in the SYSCON block for the PINTSEL
registers.
13.4 Pin description
The inputs to the pin interrupt and pattern match engine are determined by the pin
interrupt select registers in the SYSCON block. See
Section 8.6.42 “Pin interrupt select
registers” .
The pattern match engine output is assigned to an external pin through the switch matrix.
See Section 10.3.1 “Connect an internal signal to a package pin” for the steps that you
need to follow to assign the GPIO pattern match function to a pin.
13.5 General description
Pins with configurable functions can serve as external interrupts or inputs to the pattern
match engine. You can configure up to eight pins total using the PINTSEL registers in the
SYSCON block for these features.
Table 267. Pin interrupt/pattern match engine pin description
Function Direction Pin Description SWM register Reference
GPIO_INT_BMAT O any GPIO pattern match
output PINASSIGN11 Table 191