NXP Semiconductors LPC822M101JDH20, User Manual, Page: 12 / 487

UM10800 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
User manual Rev. 1.2 — 5 October 2016 12 of 487
NXP Semiconductors
UM10800
Chapter 3: LPC82x Boot ROM
The boot rom structure should be included as follows:
typedef struct {
const uint32_t reserved0; /*!< Reserved */
const uint32_t reserved1; /*!< Reserved */
const uint32_t reserved2; /*!< Reserved */
const PWRD_API_T *pPWRD; /*!< Power API function table base address */
const ROM_DIV_API_T *divApiBase; /*!< Divider API function table base address */
const I2CD_API_T *pI2CD; /*!< I2C driver routines functions table */
const uint32_t reserved5; /*!< Reserved */
const SPID_API_T *pSPID; /*!< SPI driver API function table base address */
const ADCD_API_T *pADCD; /*!< ADC driver API function table base address */
const UARTD_API_T *pUARTD; /*!< USART driver API function table base address */
} LPC_ROM_API_T;
#define ROM_DRIVER_BASE (0x1FFF1FF8UL)
3.6 Functional description
3.6.1 Memory map after any reset
The boot block is 12 KB in size. The boot block is located in the memory region starting
from the address 0x1FFF 0000. The bootloader is designed to run from this memory area,
but both the ISP and IAP software use parts of the on-chip RAM. The RAM usage is
described in
Section 25.7.2 “Memory and interrupt use for ISP and IAP” . The interrupt
vectors residing in the boot block of the on-chip flash memory also become active after
reset, i.e., the bottom 512 bytes of the boot block are also visible in the memory region
starting from the address 0x0000 0000.
3.6.2 Boot process
During the boot process, the bootloader checks if there is valid user code in flash. The
criterion for valid user code is as follows:
The reserved Cortex-M0+ exception vector location 7 (offset 0x0000 001C in the vector
table) should contain the 2’s complement of the check-sum of table entries 0 through 6.
This causes the checksum of the first 8 table entries to be 0. The bootloader code
checksums the first 8 locations in sector 0 of the flash. If the result is 0, then execution
control is transferred to the user code.
Table 4. API calls
API Description Reference
Flash IAP Flash In-Application programming Table 330
Power profiles API Configure system clock and power consumption Table 343
Integer divide routines 32-bit integer divide routines Table 399
I2C driver I2C ROM driver Table 364
SPI driver SPI ROM driver Table 356
ADC driver ADC ROM driver Table 385
UART driver USART ROM driver Table 346