LPC5411x
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© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 2.1 — 9 May 2018
76 of 105
NXP Semiconductors
LPC5411x
32-bit ARM Cortex-M4/M0+ microcontroller
[1]
Based on characterization; not tested in production.
[2]
Typical ratings are not guaranteed.
11.12 SCTimer/PWM output timing
USART slave (in synchronous mode) 2.7 V
V
DD
3.6 V
t
su(D)
data input set-up time
CCLK = 1 MHz to 12 MHz
2
-
-
ns
CCLK = 48 MHz to 60 MHz
1
-
-
ns
CCLK = 96 MHz
1
-
-
ns
t
h(D)
data input hold time
CCLK = 1 MHz to 12 MHz
2
-
-
ns
CCLK = 48 MHz to 60 MHz
1
-
-
ns
CCLK = 96 MHz
1
-
-
ns
t
v(Q)
data output valid time
CCLK = 1 MHz to 12 MHz
19
-
42
ns
CCLK = 48 MHz to 60 MHz
14
-
31
ns
CCLK = 96 MHz
13
-
28
ns
Table 32.
USART dynamic characteristics
[1]
T
amb
=
40
C to 105
C; V
DD
= 1.62 V to 3.6 V; C
L
= 30 pF balanced loading on all pins; Input slew = 1 ns, SLEW set to
standard mode for all pins; Parameters sampled at the 90 % and 10 % level of the rising or falling edge.
Symbol Parameter
Conditions
Min
Typ
[2]
Max
Unit
Fig 24. USART timing
Un_SCLK (CLKPOL = 0)
TXD
RXD
T
cy(clk)
t
su(D)
t
h(D)
t
v(Q)
START
BIT0
t
vQ)
Un_SCLK (CLKPOL = 1)
START
BIT0
BIT1
BIT1
aaa-015074
Table 33.
SCTimer/PWM output dynamic characteristics
T
amb
=
40
C to 105
C; 1.62 V
V
DD
3.6 V C
L
= 30 pF. Simulated skew (over process, voltage,
and temperature) of any two SCT fixed-pin output signals; sampled at 10 % and 90 % of the signal
level; values guaranteed by design.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
t
sk(o)
output skew time
-
-
-
2.7
ns
