UM10503
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© NXP B.V. 2015. All rights reserved.
User manual
Rev. 2.1 — 10 December 2015
888 of 1441
NXP Semiconductors
UM10503
Chapter 28: LPC43xx/LPC43Sxx Ethernet
The DMA does not acknowledge accepting the status from the MTL until it has completed
the
Time stamp
write-back and is ready to perform status write-back to the descriptor.
Fig 87. Receive DMA operation
(Re-)Fetch next
descriptor
(AHB)
error?
No
Own bit set?
Yes
Yes
Stop RxDMA
Start RxDMA
Start
(AHB)
error?
No
RxDMA suspended
Yes
Frame data
available ?
Wait for frame data
Write data to buffer(s)
Yes
Yes
Fetch next descriptor
Yes
No
Frame transfer
complete?
No
Set descriptor error
Yes
Time stamp
present?
No
Close RDES0 as last
descriptor
Write time stamp to
RDES2 & RDES3
No
(AHB)
error?
Yes
Close RDES0 as
intermediate descriptor
Frame transfer
complete?
No
Flush disabled ?
No
Flush the
remaining frame
Yes
Yes
No
No
No
Yes
Yes
Poll demand /
new frame available
No
Yes
(AHB)
error?
(AHB)
error?
No
Own bit set
for next desc?
Flush
disabled ?
