UM10503
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© NXP B.V. 2015. All rights reserved.
User manual
Rev. 2.1 — 10 December 2015
827 of 1441
NXP Semiconductors
UM10503
Chapter 28: LPC43xx/LPC43Sxx Ethernet
28.6.3 MAC Hash table high register
The 64-bit Hash table is used for group address filtering. For hash filtering, the contents of
the destination address in the incoming frame is passed through the CRC logic, and the
upper 6 bits of the CRC register are used to index the contents of the Hash table. The
most significant bit determines the register to be used (Hash Table High/Hash Table Low),
and the other 5 bits determine which bit within the register. A hash value of 00000 selects
Bit 0 of the selected register, and a value of 11111 selects Bit 31 of the selected register.
For example, if the DA of the incoming frame is received as 0x1F52419CB6AF (0x1F is
the first byte received on MII interface), then the internally calculated 6-bit Hash value is
0x2C and the HTH register bit[12] is checked for filtering. If the DA of the incoming frame
is received as 0xA00A98000045, then the calculated 6- bit Hash value is 0x07 and the
HTL register bit[7] is checked for filtering.
4
PM
Pass All Multicast
When set, this bit indicates that all received frames with a multicast destination
address (first bit in the destination address field is '1') are passed.
When reset, filtering of multicast frame depends on HMC bit.
0
R/W
5
DBF
Disable Broadcast Frames
When this bit is set, the AFM module filters all incoming broadcast frames.
When this bit is reset, the AFM module passes all received broadcast frames.
0
R/W
7:6
PCF
Pass Control Frames
These bits control the forwarding of all control frames (including unicast and multicast
PAUSE frames). Note that the processing of PAUSE control frames depends only on
RFE of the Flow Control Register.
00 = MAC filters all control frames from reaching the application.
01 = MAC forwards all control frames except PAUSE control frames to application
even if they fail the Address filter.
10 = MAC forwards all control frames to application even if they fail the Address Filter.
11 = MAC forwards control frames that pass the Address Filter.
00
R/W
8
-
Reserved.
-
-
9
-
Reserved.
-
-
10
HPF
Hash or perfect filter
When set, this bit configures the address filter to pass a frame if it matches either the
perfect filtering or the hash filtering as set by HMC or HUC bits. When low and if the
HUC/HMC bit is set, the frame is passed only if it matches the Hash filter.
0
R/W
30:11
-
Reserved
0
RO
31
RA
Receive all
When this bit is set, the MAC Receiver module passes to the Application all frames
received irrespective of whether they pass the address filter. The result of the SA/DA
filtering is updated (pass or fail) in the corresponding bits in the Receive Status Word.
When this bit is reset, the Receiver module passes to the Application only those
frames that pass the SA/DA address filter.
0
R/W
Table 603. MAC Frame filter register (MAC_FRAME_FILTER, address 0x4001 0004) bit description
…continued
Bit
Symbol
Description
Reset
value
Access