UM10503
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© NXP B.V. 2015. All rights reserved.
User manual
Rev. 2.1 — 10 December 2015
248 of 1441
16.1 How to read this chapter
This chapter applies to all parts.
16.2 Pin description
On the LPC43xx/LPC43Sxx, digital pins are grouped into 16 pin groups, named P0 to P9
and PA to PF, with up to 20 pins used per group. Each digital pin may support up to eight
different digital pin functions, including General Purpose I/O (GPIO), selectable through
the SCU pin configuration registers. Some digital pins support an additional analog
function selectable through the ENAIO registers in the SCU.
Remark:
Note that the pin name is not indicative of the GPIO port assigned to it.
16.2.1 LPC4350/30/20/10/LPC43S50/S30/S20 Pin description
Remark:
These parts contain two 10-bit ADCs (ADC0 and ADC1). The input channels of
ADC0 and ADC1 are combined in such a way that channel 0 inputs (named ADC0_0 and
ADC1_0) are tied together and connected to both, channel 0 on ADC0 and channel 0 on
ADC1, channel 1 inputs (named ADC0_1 and ADC1_1) are tied together and connected
to channel 1 on ADC0 and ADC1, and so forth. There are eight ADC channels total for the
two ADCs.
UM10503
Chapter 16: LPC43xx/LPC43Sxx Pin configuration
Rev. 2.1 — 10 December 2015
User manual
