NXP Semiconductors LPC2880, User Manual

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User manual Rev. 02 — 1 June 2007 307 of 362
NXP Semiconductors
UM10208
Chapter 24: LPC2800 LCD
4.3 Status Register (LCDSTAT - 0x8010 3000)
4.4 Raw Interrupt Status Register (LCDISTAT - 0x8010 0008)
4.5 Interrupt Mask Register (LCDIMASK - 0x8010 3010)
Table 353. Status Register (LCDSTAT - 0x8010 3000) Read Only
Bit Symbol Description Reset
value
0 LCDFIFOMT This bit is 1 if the output FIFO is empty and bit 0 of LCDIMASK is 0. 0
1 LCDFIFOH This bit is 1 if the output FIFO contains less than 8 bytes and bit 1 of
LCDIMASK is 0. 0
2 LCDOVER This bit is 1 if software attempted to write more data to LCDIBYTE,
LCDDBYTE, LCDIWORD, or LCDDWORD than the FIFO could
hold, and bit 2 of LCDIMASK is 0. This bit will not be set if a DMA
channel is used to transfer data to the FIFO. 0
3 LCDREAD This bit is 1 if a read operation has been completed, and bit 3 of
LCDIMASK is 0. 0
4 LCDBUSY This bit is 1 after reading has been initiated and has not been
completed. 0
9:5 FIFOLEV This field contains the number of bytes currently in the output FIFO.
Zero means the FIFO is empty. 0
31:10 - Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined. -
Table 354. Raw Interrupt Status Register (LCDISTAT - 0x8010 0008) Read Only
Bit Symbol Description Reset
value
0 LCDFIFOMT This bit is 1 if the output FIFO is empty. 1
1 LCDFIFOH This bit is 1 if the output FIFO contains less than 8 bytes. 1
2 This bit will show a transient 1 as an overrun occurs. Bit 2 of
the Status register is more useful as an Overrun indication. 0
3 LCDREAD This bit is 1 if a read operation has been completed. 0
31:5 - Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined. -
Table 355. Interrupt Mask Register (LCDIMASK - 0x8010 3010)
Bit Symbol Description Reset
value
0 LCDFIFOMT A 1 in this bit disables an interrupt request when the output FIFO is
empty, and also keeps bit 0 in LCDSTAT 0.
1
1 LCDFIFOH A 1 in this bit disables an interrupt request when the output FIFO
contains less than 8 bytes, and also keeps bit 1 in LCDSTAT 0. 1