NXP Semiconductors LPC2880, User Manual

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UM10208_2 © NXP B.V. 2007. All rights reserved.
User manual Rev. 02 — 1 June 2007 193 of 362
1. Features
•
Standard I
2
C bus interface, configurable as Master, Slave, or Master/Slave.
•
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
•
Programmable clock allows adjustment of I
2
C transfer rates.
•
Bidirectional data transfer between masters and slaves.
•
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
•
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
•
Supports normal (100kHz) and fast (400kHz) operation.
2. Applications
Interface to external I
2
C parts, such as serial RAMs, LCDs, tone generators, etc.
3. Description
A typical I
2
C bus configuration is shown in Figure 16–26 . Depending on the state of a
direction bit (R/W) in each frame, two types of data transfers are possible on the I
2
C bus:
•
Data transfer from a master transmitter to a slave receiver. The first byte transmitted
by the master is contains the slave address, plus 0 in the direction bit. Next follows a
number of data bytes. The slave returns an acknowledge bit after each received byte.
•
Data transfer from a slave transmitter to a master receiver. The first byte contains the
slave address and a 1 in the direction bit, and is transmitted by the master. The slave
then returns an acknowledge bit. Next follows the data bytes transmitted by the slave
to the master. The master returns an acknowledge bit after all received bytes other
than the last byte. At the end of the last received byte, the master returns a “not
acknowledge”. The master device generates all of the serial clock pulses and the Start
and Stop conditions. A frame is ended with a Stop condition or with a repeated Start
condition. Since a repeated Start condition is also the beginning of the next frame,
control of the I
2
C bus is retained by the same master.
This document calls the serial data between a Start condition and a subsequent Start or
Stop condition a “frame”.
The LPC288x I
2
C interface is byte oriented and has four operating modes: master
Transmit mode, master Receive mode, slave Transmit mode and slave Receive mode.
The interface complies with the entire I
2
C specification, and allows turning power off to the
LPC288x without causing a problem with other devices on the same I
2
C bus.
UM10208
Chapter 16: I
2
C controller
Rev. 02 — 1 June 2007 User manual