NXP Semiconductors LPC11U1x, User Manual

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User manual Rev. 5.5 — 21 December 2016 382 of 523
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Chapter 18: LPC11U3x/2x/1x System tick timer
18.5.4 System Timer Calibration value register (SYST_CALIB - 0xE000 E01C)
The value of the SYST_CALIB register is driven by the value of the SYSTCKCAL register
in the system configuration block (see
Table 37 ).
18.6 Functional description
The SysTick timer is a 24-bit timer that counts down to zero and generates an interrupt.
The intent is to provide a fixed 10 millisecond time interval between interrupts. The
SysTick timer is clocked from the CPU clock (the system clock, see
Figure 4 ) or from the
reference clock, which is fixed to half the frequency of the CPU clock. In order to generate
recurring interrupts at a specific interval, the SYST_RVR register must be initialized with
the correct value for the desired interval. A default value is provided in the SYST_CALIB
register and may be changed by software. The default value gives a 10 millisecond
interrupt rate if the CPU clock is set to 50 MHz.
18.7 Example timer calculations
To use the system tick timer, do the following:
1. Program the SYST_RVR register with the reload value RELOAD to obtain the desired
time interval.
2. Clear the SYST_CVR register by writing to it. This ensures that the timer will count
from the SYST_RVR value rather than an arbitrary value when the timer is enabled.
3. Program the SYST_SCR register with the value 0x7 which enables the SysTick timer
and the SysTick timer interrupt.
The following example illustrates selecting the SysTick timer reload value to obtain a
10 ms time interval with the LPC11U3x/2x/1x system clock set to 50 MHz.
Example (system clock = 50 MHz)
The system tick clock = system clock = 50 MHz. Bit CLKSOURCE in the SYST_CSR
register set to 1 (system clock).
RELOAD = (system tick clock frequency

10 ms)

1 = (50 MHz

10 ms)

1 = 500000

1
= 499999 = 0x0007A11F.
Table 349. System Timer Calibration value register (SYST_CALIB - 0xE000 E01C) bit
description
Bit Symbol Value Description Reset
value
23:0 TENMS See Table 455 . 0x4
29:24 - Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined. NA
30 SKEW See Table 455 . 0
31 NOREF See Table 455 . 0