UM10462
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User manual
Rev. 5.5 — 21 December 2016
164 of 523
NXP Semiconductors
UM10462
Chapter 9: LPC11U3x/2x/1x GPIO
9.5.3.3 GPIO port direction registers
Each GPIO port has one direction register for configuring the port pins as inputs or
outputs.
9.5.3.4 GPIO port mask registers
These registers affect writing and reading the MPORT registers. Zeroes in these registers
enable reading and writing; ones disable writing and result in zeros in corresponding
positions when reading.
Table 159. GPIO port 1 word pin registers (W32 to W63, addresses 0x5000 1080 to 0x5000
10FC) bit description
Bit
Symbol
Description
Reset
value
Access
31:0
PWORD
Read 0: pin is LOW.
Write 0: clear output bit.
Read 0xFFFF FFFF: pin is HIGH.
Write any value 0x0000 0001 to 0xFFFF FFFF: set output
bit.
Remark:
Only 0 or 0xFFFF FFFF can be read. Writing any
value other than 0 will set the output bit.
ext
R/W
Table 160. GPIO direction port 0 register (DIR0, address 0x5000 2000) bit description
Bit
Symbol
Description
Reset
value
Access
31:0
DIRP0
Selects pin direction for pin P0_n (bit 0 = P0_0, bit 1 = P0_1,
..., bit 31 = P0_31).
0 = input.
1 = output.
0
R/W
Table 161. GPIO direction port 1 register (DIR1, address 0x5000 2004) bit description
Bit
Symbol
Description
Reset
value
Access
31:0
DIRP1
Selects pin direction for pin P1_n (bit 0 = P1_0, bit 1 = P1_1,
..., bit 31 = P1_31).
0 = input.
1 = output.
0
R/W
Table 162. GPIO mask port 0 register (MASK0, address 0x5000 2080) bit description
Bit
Symbol
Description
Reset
value
Access
31:0
MASKP0 Controls which bits corresponding to P0_n are active in the
P0MPORT register (bit 0 = P0_0, bit 1 = P0_1, ..., bit 31 =
P0_31).
0 = Read MPORT: pin state; write MPORT: load output bit.
1 = Read MPORT: 0; write MPORT: output bit not affected.
0
R/W
