UM10429
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User manual
Rev. 1 — 20 October 2010
41 of 258
NXP Semiconductors
UM10429
Chapter 5: LPC1102 Power profiles
The routine returns a result code that indicates if the system PLL was successfully set
(PLL_CMD_SUCCESS) or not (in which case the result code identifies what went wrong).
The current system frequency value is also returned. The application should use this
information to adjust other clocks in the device (the SSP, UART, and WDT clocks, and/or
clockout).
The following definitions are needed when making set_pll power routine calls:
/* set_pll mode options */
#define
CPU_FREQ_EQU
0
#define
CPU_FREQ_LTE
1
#define
CPU_FREQ_GTE
2
#define
CPU_FREQ_APPROX
3
/* set_pll result0 options */
#define
PLL_CMD_SUCCESS
0
#define
PLL_INVALID_FREQ
1
#define
PLL_INVALID_MODE
2
#define
PLL_FREQ_NOT_FOUND
3
#define
PLL_NOT_LOCKED
4
5.4.1.1 System PLL input frequency and expected system clock
set_pll
looks for a setup in which the system PLL clock does not exceed 50 MHz. It easily
finds a solution when the ratio between the expected system clock and the system PLL
input frequency is an integer value, but it can also find solutions in other cases.
The system PLL input frequency (
Param0
) must be between 10000 to 25000 kHz (10
MHz to 25 MHz) inclusive. The expected system clock (
Param1
) must be between 1 and
50000 kHz inclusive. If either of these requirements is not met,
set_pll
returns
PLL_INVALID_FREQ and returns
Param0
as
Result1
since the PLL setting is unchanged.
5.4.1.2 Mode
The first priority of
set_pll
is to find a setup that generates the system clock at exactly the
rate specified in
Param1
. If it is unlikely that an exact match can be found, input parameter
mode (
Param2
) should be used to specify if the actual system clock can be less than or
equal, greater than or equal or approximately the value specified as the expected system
clock (
Param1
).
A call specifying CPU_FREQ_EQU will only succeed if the PLL can output exactly the
frequency requested in
Param1
.
Table 42.
set_pll routine
Routine
set_pll
Input
Param0:
system PLL input frequency (in kHz)
Param1:
expected system clock (in kHz)
Param2:
mode (CPU_FREQ_EQU, CPU_FREQ_LTE, CPU_FREQ_GTE,
CPU_FREQ_APPROX)
Param3:
system PLL lock timeout
Result
Result0:
PLL_CMD_SUCCESS | PLL_INVALID_FREQ | PLL_INVALID_MODE |
PLL_FREQ_NOT_FOUND | PLL_NOT_LOCKED
Result1:
system clock (in kHz)
