UM10429
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User manual
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NXP Semiconductors
UM10429
Chapter 19: Appendix LPC1102 ARM Cortex-M0 reference
System Control Block —
The
System Control Block
(SCB) is the programmers model
interface to the processor. It provides system implementation information and system
control, including configuration, control, and reporting of system exceptions.
System timer —
The system timer, SysTick, is a 24-bit count-down timer. Use this as a
Real Time Operating System (RTOS) tick timer or as a simple counter.
19.3 Processor
19.3.1 Programmers model
This section describes the Cortex-M0 programmers model. In addition to the individual
core register descriptions, it contains information about the processor modes and stacks.
19.3.1.1 Processor modes
The processor
modes
are:
Thread mode —
Used to execute application software. The processor enters Thread
mode when it comes out of reset.
Handler mode —
Used to handle exceptions. The processor returns to Thread mode
when it has finished all exception processing.
19.3.1.2 Stacks
The processor uses a full descending stack. This means the stack pointer indicates the
last stacked item on the stack memory. When the processor pushes a new item onto the
stack, it decrements the stack pointer and then writes the item to the new memory
location. The processor implements two stacks, the main stack and the process stack,
with independent copies of the stack pointer, see
In Thread mode, the CONTROL register controls whether the processor uses the main
stack or the process stack, see
. In Handler mode, the processor
always uses the main stack. The options for processor operations are:
19.3.1.3 Core registers
The processor core registers are:
Table 191. Summary of processor mode and stack use options
Processor
mode
Used to
execute
Stack used
Thread
Applications
Main stack or process stack
Handler
Exception
handlers
Main stack
