Chapter 6
IEC60730B tests
The library contains the following tests:
• Analog I/O test
• Clock test
• CPU register test
• Digital I/O test
• Invariable memory (flash) test
• Variable memory (RAM) test
• Program counter test
• Stack test
• Watchdog test
• Touch-sensing peripheral TSIv5 test
The following chapters describe each test with focus on the example application (debugging).
6.1 AIO test
The analog IO test procedure performs the plausibility check of the digital IO interface of the processor. The analog IO test can
be performed once after the MCU reset and also during runtime.
There are three values tested in the application:
• VrefH
• VrefL
• Bandgap
Ensure that the ADC peripheral is set up correctly before calling the AIO test. In some cases, it is necessary to connect this signal
externally (by a wire) to the corresponding pin. The test is perfomed in a sequence, as defined in the
safety_config.h
file:
/* ADC test */
...
...
{\
{(uint32_t)ADC_MIN_LIMIT(0), (uint32_t)ADC_MAX_LIMIT(60)}, \
{(uint32_t)ADC_MIN_LIMIT(ADC_MAX), (uint32_t)ADC_MAX_LIMIT(ADC_MAX)},\
{(uint32_t)ADC_MIN_LIMIT(ADC_BANDGAP_LEVEL_RAW),
(uint32_t)ADC_MAX_LIMIT(ADC_BANDGAP_LEVEL_RAW)}\ }
#define FS_CFG_AIO_CHANNELS_INIT {6, 5, 4} /* ADC Channels for V_refl, V_refh, bandgap */
An example of the setting is shown above. The
"FS_CFG_AIO_CHANNELS_INIT"
macro defines that the ADC channel 6 is tested
first, with the limits corresponding to VrefL (GND). Channel 5 is tested next, with the limits of VrefH (VCC). Channel 4 is tested
next, with the limits for the bandgap.
NXP Semiconductors
LPC CM0 Safety Example , Rev. 3, 07/2021
User's Guide
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