NXP Semiconductors Kinetis KE1xZ256, Reference Manual

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Field Function
0 - Clock disabled
1 - Clock enabled
29
INUSE
Clock Gate Control
>This read-only bit shows that this peripheral is being used .
0 - Peripheral is not being used.
1 - Peripheral is being used. Software cannot modify the existing clocking configuration.
28-27
—
This read-only bit field is reserved and always has the value 0.
26-24
PCS
Peripheral Clock Source Select
This read/write bit field is used for peripherals that support various clock selections.
This field can only be written when the CGC bit is 0 (clock disabled). Likewise, if the INUSE flag is set,
this field is locked.
000 - Clock is off .
001 - System Oscillator Bus Clock.
010 - Slow IRC Clock.
011 - Fast IRC Clock.
100 - Reserved.
101 - Low-power FLL (LPFLL) clock.
110 - Reserved.
111 - Reserved.
23-4
—
This read-only bit field is reserved and always has the value 0.
3
—
This read-only bit field is reserved and always has the value 0.
2-0
—
This read-only bit field is reserved and always has the value 0.
20.4.1.32 PCC CMP0 (PCC_CMP0)
20.4.1.32.1 Address
Register Offset
PCC_CMP0 400651CCh
PCC Register
Chapter 20 Peripheral Clock Controller (PCC)
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
NXP Semiconductors 455