NXP Semiconductors Kinetis KE1xZ256, Reference Manual

Page: 273 / 1325

31 0 0 31
Bit-band region Alias bit-band region
1 MByt
e
32 MByt
e
Figure 14-2. Alias bit-band mapping
NOTE
Each bit in bit-band region has an equivalent bit that can be
manipulated through bit 0 in a corresponding long word in the
alias bit-band region.
14.4.2 Bit Manipulation Engine
The Bit Manipulation Engine (BME) provides hardware support for atomic read-modify-
write memory operations to the peripheral address space. By combining the basic load
and store instruction support in the Cortex-M instruction set architecture with the concept
of decorated storage provided by the BME, the resulting implementation provides a
robust and efficient read-modify-write capability to this class of ultra low-end
microcontrollers. See the Bit Manipulation Engine Block Guide (BME) for a detailed
description of BME functionality.
14.5 Peripheral memory map
The peripheral memory map is accessible via a crossbar slave port and the AIPS
peripheral bridge. The peripheral bridge converts register access from AHB bus domain
to peripheral bus domain.
Chapter 14 Memory and memory map
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
NXP Semiconductors 273