NXP Semiconductors Kinetis KE1xZ256, Reference Manual

Page: 1070 / 1325

• Lock register requires POR or software reset to enable write access
• Access control registers require system reset to enable read and/or write access
• Configurable 1, 2, 4, 8, 16, 32, 64 or 128 Hz square wave output with optional
interrupt
43.2.2 Modes of operation
The RTC remains functional in all low power modes and can generate an interrupt to exit
any low power mode.
43.2.3 RTC signal descriptions
Table 43-1. RTC signal descriptions
Signal Description I/O
RTC_CLKOUT Prescaler square-wave output or 32kHz
crystal clock O
43.2.3.1 RTC clock output
The RTC_CLKOUT signal can output either a square wave prescaler output
(configurable to 1, 2, 4, 8, 16, 32, 64 or 128 Hz) or the 32 kHz crystal clock.
43.3 Register definition
All registers must be accessed using 32-bit writes and all register accesses incur three
wait states.
Write accesses to any register by non-supervisor mode software, when the supervisor
access bit in the control register is clear, will terminate with a bus error.
Read accesses by non-supervisor mode software complete as normal.
Writing to a register protected by the write access register or lock register does not
generate a bus error, but the write will not complete.
Reading a register protected by the read access register does not generate a bus error, but
the register will read zero.
Register definition
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
1070 NXP Semiconductors