NXP Semiconductors KE1xF Series, Reference Manual, Page: 950 / 1483

PDB
counter
MOD, IDLY
0
DACINT x
DACINT x x3
DACINT x x2
... ...
CH n DLY1
CH n DLY0
DAC internal trigger x
Ch n pre-trigger 0
Ch n pre-trigger 1
Ch n trigger
PDB interrupt
... ...
Trigger input event
Figure 40-7. PDB ADC triggers and DAC interval triggers use case
NOTE
Because the DAC interval counters share the prescaler with
PDB counter, PDB must be enabled if the DAC interval trigger
outputs are used in the applications.
40.5.4 Pulse-Out's
PDB can generate pulse outputs of configurable width.
• When the PDB counter reaches the value set in POyDLY[DLY1], then the Pulse-Out
goes high.
• When the PDB counter reaches POyDLY[DLY2], then it goes low.
POyDLY[DLY2] can be set either greater or less than POyDLY[DLY1].
ADC pre-trigger/trigger outputs and Pulse-Out generation have the same time base,
because they both share the PDB counter. The pulse-out connections implemented in this
MCU are described in the device's chip configuration details.
Functional description
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
950 NXP Semiconductors