NXP Semiconductors KE1xF Series, Reference Manual, Page: 851 / 1483

The hardware trigger select event, ADHWTSn, must be set prior to the receipt of the
ADHWT signal. If these conditions are not met, the converter may ignore the trigger or
use an incorrect configuration. If a hardware trigger select event is asserted during a
conversion, it must stay asserted until the end of current conversion and remain set until
the receipt of the ADHWT signal to trigger a new conversion. The channel and status
fields selected for the conversion depend on the active trigger select signal:
• ADHWTSA active selects SC1A.
• ADHWTSn active selects SC1n.
Note
Asserting more than one hardware trigger select signal
(ADHWTSn) at the same time will cause unpredictable results.
To avoid this, select only one hardware trigger select signal
(ADHWTSn) prior to the next intended conversion.
When the conversion is completed, the result is placed in the Rn registers associated with
the ADHWTSn received. For example:
• ADHWTSA active selects RA register
• ADHWTSn active selects Rn register
The conversion complete flag associated with the ADHWTSn received, that is,
SC1n[COCO], is then set and an interrupt is generated if the respective conversion
complete interrupt has been enabled, that is, SC1[AIEN]=1.
37.5.4 Conversion control
Conversions can be performed as determined by CFG1[MODE] as shown in the
description of CFG1[MODE].
Conversions can be initiated by a software or hardware trigger.
In addition, the ADC module can be configured for:
• Low-power operation
• Long sample time
• Continuous conversion
• Hardware average
• Automatic compare of the conversion result to a software-determined compare value
37.5.4.1 Initiating conversions
A conversion is initiated:
Chapter 37 Analog-to-Digital Converter (ADC)
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
NXP Semiconductors 851