NXP Semiconductors KE1xF Series, Reference Manual, Page: 190 / 1483

10.4.1.20.3 Fields
Field Function
31
LK
Enable
This bit shows whether the register can be written or not.
0b - Register can be written.
1b - Register cannot be written until the next system Reset.
30-24
SEL3
Trigger MUX Input 3 Source Select
This read/write bit field is used to configure the MUX select for peripheral trigger input 3. Refer to the
Select Bit Fields table in the Features section for bit field information.
23
—
This read-only bit field is reserved and always has the value 0.
22-16
SEL2
Trigger MUX Input 2 Source Select
This read/write bit field is used to configure the MUX select for peripheral trigger input 2. Refer to the
Select Bit Fields table in the Features section for bit field information.
15
—
This read-only bit field is reserved and always has the value 0.
14-8
SEL1
Trigger MUX Input 1 Source Select
This read/write bit field is used to configure the MUX select for peripheral trigger input 1. Refer to the
Select Bit Fields table in the Features section for bit field information.
7
—
This read-only bit field is reserved and always has the value 0.
6-0
SEL0
Trigger MUX Input 0 Source Select
This read/write bit field is used to configure the MUX select for peripheral trigger input 0. Refer to the
Select Bit Fields table in the Features section for bit field information.
10.4.1.21 TRGMUX LPUART0 (TRGMUX_LPUART0)
10.4.1.21.1 Address
Register Offset
TRGMUX_LPUART0 4006204Ch
TRGMUX Register
Memory map and register definition
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
190 NXP Semiconductors